u-boot.git/include/fsl_esdhc.h, branch v2011.06 Unnamed repository; edit this file 'description' to name the repository. fsl_esdhc: Deal with watermark level register related changes 2011-04-10T16:17:55+00:00 Priyanka Jain Priyanka.Jain@freescale.com 2011-02-09T03:54:10+00:00 32c8cfb23cd8beb814edd217c02e6aa5c7a64acf P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark level register description has been changed: 9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00 25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00 Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark
level register description has been changed:

9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00
25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
ppc/85xx: PIO Support for FSL eSDHC Controller Driver 2010-04-24T02:02:30+00:00 Dipen Dudhat dipen.dudhat@freescale.com 2009-10-05T10:11:58+00:00 77c1458d130d33704472db9c88d2310c8fc90f4c On some Freescale SoC Internal DMA of eSDHC controller has bug. So PIO Mode has been introduced to do data transfer using CPU. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> 
On some Freescale SoC Internal DMA of eSDHC controller has bug.
So PIO Mode has been introduced to do data transfer using CPU.

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
fsl_esdhc: Only modify the field we are changing in WML 2010-04-07T05:01:11+00:00 Roy Zang tie-fei.zang@freescale.com 2010-02-09T10:23:33+00:00 ab467c512e79dbd14f02352655f054a4304c457e When we set the read or write watermark in WML we should maintain the rest of the register as is, rather than using some hard coded value. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
When we set the read or write watermark in WML we should maintain the
rest of the register as is, rather than using some hard coded value.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
fsl_esdhc: Add function to reset the eSDHC controller 2010-04-07T05:01:11+00:00 Jerry Huang Chang-Ming.Huang@freescale.com 2010-03-18T20:57:06+00:00 48bb3bb5ac4dd21e931ae157caad6449bcb2d0d4 To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
To support multiple block read command we must set abort or use auto
CMD12.  If we booted from eSDHC controller neither of these are used
and thus we need to reset the controller to allow multiple block read
to function.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
fsl_esdhc: Always stop clock before changing frequency 2010-04-07T05:01:11+00:00 Kumar Gala galak@kernel.crashing.org 2010-03-18T20:51:05+00:00 cc4d1226585fa2544b5116702b02eacbb7aa48a1 We need to stop the clocks on 83xx/85xx as well as imx. No need to make this code conditional to just imx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Stefano Babic <sbabic@denx.de> 
We need to stop the clocks on 83xx/85xx as well as imx.  No need to make
this code conditional to just imx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefano Babic <sbabic@denx.de>
fsl_esdhc: add support for mx51 processor 2010-03-07T18:36:36+00:00 Stefano Babic sbabic@denx.de 2010-02-05T14:11:27+00:00 c67bee1460a0da89ef08cbc28375171acc9a4227 The esdhc controller in the mx51 processor is quite the same as the one in some powerpc processors (MPC83xx, MPC85xx). This patches adapts the driver to support the arm mx51. Signed-off-by: Stefano Babic <sbabic@denx.de> 
The esdhc controller in the mx51 processor is quite
the same as the one in some powerpc processors
(MPC83xx, MPC85xx). This patches adapts the driver
to support the arm mx51.

Signed-off-by: Stefano Babic <sbabic@denx.de>
fsl_esdhc: fix wrong clock mask 2010-01-26T04:13:26+00:00 Li Yang leoli@freescale.com 2010-01-07T08:00:13+00:00 1118cdbfeb8fc3acfe542d08703153ac188f9dbd Fix typo in SYSCTL_CLOCK_MASK, which caused residual in high bits of SDCLKFS. Signed-off-by: Jin Qing <B24347@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
Fix typo in SYSCTL_CLOCK_MASK, which caused residual in high bits of SDCLKFS.

Signed-off-by: Jin Qing <B24347@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
fsl_esdhc: Add device tree fixups 2009-07-16T20:24:06+00:00 Anton Vorontsov avorontsov@ru.mvista.com 2009-06-09T20:25:29+00:00 b33433a63fe08c9e723ea15a7c7c7143bf527c6d This patch implements fdt_fixup_esdhc() function that is used to fixup the device tree. The function adds status = "disabled" propery if esdhc pins muxed away, otherwise it fixups clock-frequency for esdhc nodes. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> 
This patch implements fdt_fixup_esdhc() function that is used to fixup
the device tree.

The function adds status = "disabled" propery if esdhc pins muxed away,
otherwise it fixups clock-frequency for esdhc nodes.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Add support for the Freescale eSDHC found on 8379 and 8536 SoCs 2009-02-17T00:07:42+00:00 Andy Fleming afleming@freescale.com 2008-10-30T21:47:16+00:00 50586ef24ed5caf6ce5591df76f355009da2cd79 This uses the new MMC framework Some contributions by Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> 
This uses the new MMC framework

Some contributions by Dave Liu <daveliu@freescale.com>

Signed-off-by: Andy Fleming <afleming@freescale.com>