u-boot.git/include/fsl_ifc.h, branch v2016.01 Unnamed repository; edit this file 'description' to name the repository. nand: Sync with Linux v4.1 2015-08-26T03:53:57+00:00 Scott Wood scottwood@freescale.com 2015-06-27T00:03:26+00:00 d3963721d93fafa8da0f78de17602ef308ec15ba Update the NAND code to match Linux v4.1. The previous sync was from Linux v3.15 in commit 4e67c57125290b25. CONFIG_SYS_NAND_RESET_CNT is removed, as the upstream Linux code now has its own timeout. Plus, CONFIG_SYS_NAND_RESET_CNT was undocumented and not selected by any board. Signed-off-by: Scott Wood <scottwood@freescale.com> 
Update the NAND code to match Linux v4.1.  The previous sync was
from Linux v3.15 in commit 4e67c57125290b25.

CONFIG_SYS_NAND_RESET_CNT is removed, as the upstream Linux code now
has its own timeout.  Plus, CONFIG_SYS_NAND_RESET_CNT was undocumented
and not selected by any board.

Signed-off-by: Scott Wood <scottwood@freescale.com>
driver/ifc: Add 64KB page support 2015-04-23T23:46:50+00:00 Jaiprakash Singh b44839@freescale.com 2015-03-21T02:28:27+00:00 39b0bbbb23076a7109eeb20b6ae812edcd60ffc2 IFC has two register pages.Till IFC version 1.4 each register page is 4KB each.But IFC ver 2.0 register page size is 64KB each.IFC regiters structure is break into two viz FCM and RUNTIME.FCM(Flash control machine) registers are defined in PAGE0 and controls IFC generic functionality. RUNTIME registers are defined in PAGE1 and controls NAND and GPCM funcinality. FCM and RUNTIME structures defination is common for IFC version 1.4 and 2.0. Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> 
IFC has two register pages.Till IFC version 1.4 each
register page is 4KB each.But IFC ver 2.0 register page
size is 64KB each.IFC regiters structure is break into
two viz FCM and RUNTIME.FCM(Flash control machine) registers
are defined in PAGE0 and controls IFC generic functionality.
RUNTIME registers are defined in PAGE1 and controls NAND and
GPCM funcinality.

FCM and RUNTIME structures defination is common for IFC
version 1.4 and 2.0.

Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
driver/nand: Add support of 16K SRAM for IFC 2.0 2014-07-22T23:25:54+00:00 Prabhakar Kushwaha prabhakar@freescale.com 2014-06-14T03:18:19+00:00 591dd192307d81cf8f8705b06854e973c53d4c4d Internal SRAM has been incresed from 8KB to 16KB for IFC cotroller ver 2.0. Update the page offset calculation logic to support the same. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> 
Internal SRAM has been incresed from 8KB to 16KB for IFC cotroller ver 2.0.

Update the page offset calculation logic to support the same.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
driver/nand: Update SRAM initialize logic for IFC. 2014-07-22T23:25:54+00:00 Prabhakar Kushwaha prabhakar@freescale.com 2014-06-12T06:44:00+00:00 04818bbdc34cb02b2590af8e5f77118ed8a8d755 IFC controller v1.1.0 requires internal SRAM initialize by reading NAND flash. Higher controller versions have provided "SRAM init" bit in NCFGR register space. update SRAM initialize logic to reflect the same. Also print error message in case of Page read error. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> 
IFC controller v1.1.0 requires internal SRAM initialize by reading
NAND flash. Higher controller versions have provided "SRAM init" bit in
NCFGR register space.

update SRAM initialize logic to reflect the same.

Also print error message in case of Page read error.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
driver/fsl_ifc: Add a function to finalize CS0 address binding 2014-04-23T00:58:47+00:00 York Sun yorksun@freescale.com 2014-03-19T20:52:34+00:00 e77224e2d8a2ec5accbedc70c87f171115a3e2b2 For fsl-lsch3 NOR flash boot, IFC CS0 needs to be binded with address within 32-bit at fist. After u-boot relocates to DDR, CS0 can be binded to higher address to support large space. Signed-off-by: York Sun <yorksun@freescale.com> CC: Prabhakar Kushwaha <prabhakar@freescale.com> 
For fsl-lsch3 NOR flash boot, IFC CS0 needs to be binded with address
within 32-bit at fist. After u-boot relocates to DDR, CS0 can be binded
to higher address to support large space.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Prabhakar Kushwaha <prabhakar@freescale.com>
driver/ifc:Change accessor function to take care of endianness 2014-02-03T16:38:51+00:00 Prabhakar Kushwaha prabhakar@freescale.com 2014-01-18T06:58:30+00:00 1b4175d6fa12b8012c119889ad5cc1e65c3cf6ba IFC registers can be of type Little Endian or big Endian depending upon Freescale SoC. Here SoC defines the register type of IFC IP. So update acessor functions with common IFC acessor functions to take care both type of endianness. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: York Sun <yorksun@freescale.com> 
IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.

So update acessor functions with common IFC acessor functions to take care
both type of endianness.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2013-12-02T13:38:28+00:00 Tom Rini trini@ti.com 2013-12-02T13:38:28+00:00 77fdd6d1eb69c1194148a9f4b4428d903af3619f 






Driver/IFC: Move Freescale IFC driver to a common driver
2013-11-25T19:43:47+00:00

York Sun
yorksun@freescale.com

2013-10-22T19:39:02+00:00

0b66513b2706e941b55ffc6ad5aa011e10e87960

Freescale IFC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the driver to driver/misc
and fix the header file includes.

Signed-off-by: York Sun <yorksun@freescale.com>





Freescale IFC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the driver to driver/misc
and fix the header file includes.

Signed-off-by: York Sun <yorksun@freescale.com>