<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/include/fsl_mmdc.h, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>include: Remove duplicate newlines</title>
<updated>2024-07-29T21:01:04+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2024-07-22T23:28:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6627fbba203f89a316299d35f6a2ff3f33dd15c8'/>
<id>6627fbba203f89a316299d35f6a2ff3f33dd15c8</id>
<content type='text'>
Drop all duplicate newlines. No functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Drop all duplicate newlines. No functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=83d290c56fab2d38cd1ab4c4cc7099559c1d5046'/>
<id>83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "drivers/ddr/fsl: Dual-license DDR driver"</title>
<updated>2018-02-15T02:34:05+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-02-15T02:34:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ac727577f0f84991e0cae999f175174e606027e2'/>
<id>ac727577f0f84991e0cae999f175174e606027e2</id>
<content type='text'>
Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/ddr/fsl: Dual-license DDR driver</title>
<updated>2018-02-09T16:36:40+00:00</updated>
<author>
<name>York Sun</name>
<email>york.sun@nxp.com</email>
</author>
<published>2018-02-07T19:47:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ee3556bcafbb05e59aabdc31368984e76acaabc4'/>
<id>ee3556bcafbb05e59aabdc31368984e76acaabc4</id>
<content type='text'>
To make this driver easier to be reused, dual-license DDR driver.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
CC: Simon Glass &lt;sjg@chromium.org&gt;
CC: Tom Rini &lt;trini@konsulko.com&gt;
CC: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
CC: Thomas Schaefer &lt;thomas.schaefer@kontron.com&gt;
CC: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
CC: Robert P. J. Day &lt;rpjday@crashcourse.ca&gt;
CC: Alexander Merkle &lt;alexander.merkle@lauterbach.com&gt;
CC: Joakim Tjernlund &lt;joakim.tjernlund@transmode.se&gt;
CC: Curt Brune &lt;curt@cumulusnetworks.com&gt;
CC: Valentin Longchamp &lt;valentin.longchamp@keymile.com&gt;
CC: Wolfgang Denk &lt;wd@denx.de&gt;
CC: Anatolij Gustschin &lt;agust@denx.de&gt;
CC: Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;
CC: Marek Vasut &lt;marek.vasut@gmail.com&gt;
CC: Kyle Moffett &lt;Kyle.D.Moffett@boeing.com&gt;
CC: Sebastien Carlier &lt;sebastien.carlier@gmail.com&gt;
CC: Stefan Roese &lt;sr@denx.de&gt;
CC: Peter Tyser &lt;ptyser@xes-inc.com&gt;
CC: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
CC: Peter Tyser &lt;ptyser@xes-inc.com&gt;
CC: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To make this driver easier to be reused, dual-license DDR driver.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
CC: Simon Glass &lt;sjg@chromium.org&gt;
CC: Tom Rini &lt;trini@konsulko.com&gt;
CC: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
CC: Thomas Schaefer &lt;thomas.schaefer@kontron.com&gt;
CC: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
CC: Robert P. J. Day &lt;rpjday@crashcourse.ca&gt;
CC: Alexander Merkle &lt;alexander.merkle@lauterbach.com&gt;
CC: Joakim Tjernlund &lt;joakim.tjernlund@transmode.se&gt;
CC: Curt Brune &lt;curt@cumulusnetworks.com&gt;
CC: Valentin Longchamp &lt;valentin.longchamp@keymile.com&gt;
CC: Wolfgang Denk &lt;wd@denx.de&gt;
CC: Anatolij Gustschin &lt;agust@denx.de&gt;
CC: Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;
CC: Marek Vasut &lt;marek.vasut@gmail.com&gt;
CC: Kyle Moffett &lt;Kyle.D.Moffett@boeing.com&gt;
CC: Sebastien Carlier &lt;sebastien.carlier@gmail.com&gt;
CC: Stefan Roese &lt;sr@denx.de&gt;
CC: Peter Tyser &lt;ptyser@xes-inc.com&gt;
CC: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
CC: Peter Tyser &lt;ptyser@xes-inc.com&gt;
CC: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>driver: ddr: fsl_mmdc: Pass board parameters through data structure</title>
<updated>2016-09-26T15:53:07+00:00</updated>
<author>
<name>York Sun</name>
<email>york.sun@nxp.com</email>
</author>
<published>2016-09-26T15:09:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1fdcc8dfc7612acc765cd483051dcfaac399f4f1'/>
<id>1fdcc8dfc7612acc765cd483051dcfaac399f4f1</id>
<content type='text'>
Instead of using multiple macros, a data structure is used to pass
board-specific parameters to MMDC DDR driver.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
CC: Shengzhou Liu &lt;Shengzhou.Liu@nxp.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Instead of using multiple macros, a data structure is used to pass
board-specific parameters to MMDC DDR driver.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
CC: Shengzhou Liu &lt;Shengzhou.Liu@nxp.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a</title>
<updated>2016-09-14T21:08:22+00:00</updated>
<author>
<name>Shengzhou Liu</name>
<email>Shengzhou.Liu@nxp.com</email>
</author>
<published>2016-08-26T10:30:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b9e745bbe2562fda710d668dc9cef46e0b23049f'/>
<id>b9e745bbe2562fda710d668dc9cef46e0b23049f</id>
<content type='text'>
This general MMDC driver adds basic support for Freescale MMDC
(Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8
LS1012A SoC for DDR3L, there will be a update to this driver to
support more flexible configuration if new features (DDR4, multiple
controllers/chip selections, etc) are implimented in future.

Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/
LS1012AFRDM.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This general MMDC driver adds basic support for Freescale MMDC
(Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8
LS1012A SoC for DDR3L, there will be a update to this driver to
support more flexible configuration if new features (DDR4, multiple
controllers/chip selections, etc) are implimented in future.

Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/
LS1012AFRDM.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>armv8: ls1012a: Update Refresh cycle for DDR</title>
<updated>2016-08-02T16:46:02+00:00</updated>
<author>
<name>Prabhakar Kushwaha</name>
<email>prabhakar.kushwaha@nxp.com</email>
</author>
<published>2016-07-19T10:24:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=37eac3f4609c4a6b7c8c3a2f4046fbc5deb07299'/>
<id>37eac3f4609c4a6b7c8c3a2f4046fbc5deb07299</id>
<content type='text'>
Refresh cycle value must be selected based on the frequency
of DDR. tREFI = 7.8 us as per JEDEC. The value for MDREF[REF_CNT]
should be based on round up (tREFI/tCK) formula. For 500MHz, mdref
value should be 0x0f3c8000.

Signed-off-by: Calvin Johnson &lt;calvin.johnson@nxp.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Refresh cycle value must be selected based on the frequency
of DDR. tREFI = 7.8 us as per JEDEC. The value for MDREF[REF_CNT]
should be based on round up (tREFI/tCK) formula. For 500MHz, mdref
value should be 0x0f3c8000.

Signed-off-by: Calvin Johnson &lt;calvin.johnson@nxp.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>armv8: ls1012a: Enable DDR row-bank-column decoding</title>
<updated>2016-08-02T16:45:56+00:00</updated>
<author>
<name>Prabhakar Kushwaha</name>
<email>prabhakar.kushwaha@nxp.com</email>
</author>
<published>2016-07-19T10:24:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9c3fca2a79be3d9d67d7766bbd85efc941bcb237'/>
<id>9c3fca2a79be3d9d67d7766bbd85efc941bcb237</id>
<content type='text'>
Enable DDR row-bank-column decoding to decode DDR address as
row-bank-column instead of bank-row-column for improving
performance of serial data transfers.

Signed-off-by: Calvin Johnson &lt;calvin.johnson@nxp.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable DDR row-bank-column decoding to decode DDR address as
row-bank-column instead of bank-row-column for improving
performance of serial data transfers.

Signed-off-by: Calvin Johnson &lt;calvin.johnson@nxp.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>armv8: fsl-layerscape: Add support of QorIQ LS1012A SoC</title>
<updated>2016-06-03T21:12:50+00:00</updated>
<author>
<name>Prabhakar Kushwaha</name>
<email>prabhakar.kushwaha@nxp.com</email>
</author>
<published>2016-06-03T13:11:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b7f2bbfff6dcc2d5989bb1d20500c431f7927daf'/>
<id>b7f2bbfff6dcc2d5989bb1d20500c431f7927daf</id>
<content type='text'>
The QorIQ LS1012A processor, optimized for battery-backed or
USB-powered, integrates a single ARM Cortex-A53 core with a hardware
packet forwarding engine and high-speed interfaces to deliver
line-rate networking performance.

This patch add support of LS1012A SoC along with
 - Update platform &amp; DDR clock read logic as per SVR
 - Define MMDC controller register set.
 - Update LUT base address for PCIe
 - Avoid L3 platform cache compilation
 - Update USB address, errata
 - SerDes table
 - Added CSU IDs for SDHC2, SAI-1 to SAI-4

Signed-off-by: Calvin Johnson &lt;calvin.johnson@nxp.com&gt;
Signed-off-by: Makarand Pawagi &lt;makarand.pawagi@mindspeed.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The QorIQ LS1012A processor, optimized for battery-backed or
USB-powered, integrates a single ARM Cortex-A53 core with a hardware
packet forwarding engine and high-speed interfaces to deliver
line-rate networking performance.

This patch add support of LS1012A SoC along with
 - Update platform &amp; DDR clock read logic as per SVR
 - Define MMDC controller register set.
 - Update LUT base address for PCIe
 - Avoid L3 platform cache compilation
 - Update USB address, errata
 - SerDes table
 - Added CSU IDs for SDHC2, SAI-1 to SAI-4

Signed-off-by: Calvin Johnson &lt;calvin.johnson@nxp.com&gt;
Signed-off-by: Makarand Pawagi &lt;makarand.pawagi@mindspeed.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
