<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/include/linux/intel-smc.h, branch v2021.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>arm: socfpga: soc64: Define SMC function identifiers for PSCI SiP services</title>
<updated>2021-01-15T09:48:36+00:00</updated>
<author>
<name>Chee Hong Ang</name>
<email>chee.hong.ang@intel.com</email>
</author>
<published>2020-12-24T10:21:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=313de7335248ff3246e4f2da4e63e50c350a2ac3'/>
<id>313de7335248ff3246e4f2da4e63e50c350a2ac3</id>
<content type='text'>
This header file defines the Secure Monitor Call (SMC) message
protocol for ATF (BL31) PSCI runtime services. It includes all
the PSCI SiP function identifiers for the secure runtime services
provided by ATF. The secure runtime services include System Manager's
registers access, 2nd phase bitstream FPGA reconfiguration, Remote
System Update (RSU) and etc.

Signed-off-by: Chee Hong Ang &lt;chee.hong.ang@intel.com&gt;
Signed-off-by: Siew Chin Lim &lt;elly.siew.chin.lim@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This header file defines the Secure Monitor Call (SMC) message
protocol for ATF (BL31) PSCI runtime services. It includes all
the PSCI SiP function identifiers for the secure runtime services
provided by ATF. The secure runtime services include System Manager's
registers access, 2nd phase bitstream FPGA reconfiguration, Remote
System Update (RSU) and etc.

Signed-off-by: Chee Hong Ang &lt;chee.hong.ang@intel.com&gt;
Signed-off-by: Siew Chin Lim &lt;elly.siew.chin.lim@intel.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
