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<title>u-boot.git/include/linux/mtd/fsl_upm.h, branch v2011.03</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>Add wait flags to support board/chip specific delays</title>
<updated>2009-03-23T20:53:40+00:00</updated>
<author>
<name>Wolfgang Grandegger</name>
<email>wg@grandegger.com</email>
</author>
<published>2009-02-11T17:38:23+00:00</published>
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<content type='text'>
The NAND flash on the TQM8548_BE modules requires a short delay after
running the UPM pattern like the MPC8360ERDK board does. The TQM8548_BE
requires a further short delay after writing out a buffer. Normally the
R/B pin should be checked, but it's not connected on the TQM8548_BE.
The corresponding Linux FSL UPM driver uses similar delay points at the
same locations. To manage these extra delays in a more general way, I
introduced the "wait_flags" field allowing the board-specific driver to
specify various types of extra delay.

Signed-off-by: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
The NAND flash on the TQM8548_BE modules requires a short delay after
running the UPM pattern like the MPC8360ERDK board does. The TQM8548_BE
requires a further short delay after writing out a buffer. Normally the
R/B pin should be checked, but it's not connected on the TQM8548_BE.
The corresponding Linux FSL UPM driver uses similar delay points at the
same locations. To manage these extra delays in a more general way, I
introduced the "wait_flags" field allowing the board-specific driver to
specify various types of extra delay.

Signed-off-by: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>Add support for TQM-specific chip select logic to FSL-UPM</title>
<updated>2009-03-23T20:53:39+00:00</updated>
<author>
<name>Wolfgang Grandegger</name>
<email>wg@grandegger.com</email>
</author>
<published>2009-02-11T17:38:22+00:00</published>
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For the NAND chips on the TQM8548 modules, a special chip-select logic is
used. It uses dedicated address lines to be set via UPM machine address
register (mar). This patch adds such support to the FSL-UPM driver.

Signed-off-by: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
For the NAND chips on the TQM8548 modules, a special chip-select logic is
used. It uses dedicated address lines to be set via UPM machine address
register (mar). This patch adds such support to the FSL-UPM driver.

Signed-off-by: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>Add multi chip support to the FSL-UPM driver</title>
<updated>2009-03-23T20:53:38+00:00</updated>
<author>
<name>Wolfgang Grandegger</name>
<email>wg@grandegger.com</email>
</author>
<published>2009-02-11T17:38:21+00:00</published>
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<id>e93c1c169d49eda7babad9c781f541e2e34f0ff0</id>
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This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. The "dev_ready" callback of the "struct fsl_upm_nand" is now
called with the argument "chip_nr" to allow testing the proper chip
select line. The NAND support of the MPC8360ERDK is updated as well.
No other boards are currently using the FSL UPM driver.

Signed-off-by: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. The "dev_ready" callback of the "struct fsl_upm_nand" is now
called with the argument "chip_nr" to allow testing the proper chip
select line. The NAND support of the MPC8360ERDK is updated as well.
No other boards are currently using the FSL UPM driver.

Signed-off-by: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>nand: fsl_upm: convert to updated MTD NAND infrastructure</title>
<updated>2008-08-12T16:31:27+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2008-06-12T16:10:21+00:00</published>
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<content type='text'>
Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
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<pre>
Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NAND FSL UPM: driver re-write using the hwcontrol callback</title>
<updated>2008-06-10T23:22:26+00:00</updated>
<author>
<name>Wolfgang Grandegger</name>
<email>wg@grandegger.com</email>
</author>
<published>2008-06-05T11:02:29+00:00</published>
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<id>a75a57ef6e4b613c81434971e96ed70cf9ec9ba0</id>
<content type='text'>
This is a re-write of the NAND FSL UPM driver using the more universal
hwcontrol callback (instead of the cmdfunc callback). Here is a brief
list of furher modifications:

- For the time being, the UPM setup writing the UPM array has been
  removed from the driver and must now be done by the board specific
  code.

- The bus width definition in "struct fsl_upm_nand" is now in bits to
  comply with the corresponding Linux driver and 8, 16 and 32 bit
  accesses are supported.

- chip-&gt;dev_read is only set if fun-&gt;dev_ready != NULL, which is
  required for boards not connecting the R/B pin.

- A few issue have been fixed with MxMR bit manipulation like in the
  corresponding Linux driver.

Note: I think the "io_addr" field of "struct fsl_upm" could be removed
      as well, because the address is already determined by
      "nand-&gt;IO_ADDR_[RW]", but I'm not 100% sure.

This patch has been tested on a TQM8548 modules with the NAND chip
Micron MT29F8G08FABWP.

This patch is based on the following patches posted to this list a few
minutes ago:

  PPC: add accessor macros to clear and set bits in one shot
  83xx/85xx/86xx: add more MxMR local bus definitions

Signed-off-by: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
Acked-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is a re-write of the NAND FSL UPM driver using the more universal
hwcontrol callback (instead of the cmdfunc callback). Here is a brief
list of furher modifications:

- For the time being, the UPM setup writing the UPM array has been
  removed from the driver and must now be done by the board specific
  code.

- The bus width definition in "struct fsl_upm_nand" is now in bits to
  comply with the corresponding Linux driver and 8, 16 and 32 bit
  accesses are supported.

- chip-&gt;dev_read is only set if fun-&gt;dev_ready != NULL, which is
  required for boards not connecting the R/B pin.

- A few issue have been fixed with MxMR bit manipulation like in the
  corresponding Linux driver.

Note: I think the "io_addr" field of "struct fsl_upm" could be removed
      as well, because the address is already determined by
      "nand-&gt;IO_ADDR_[RW]", but I'm not 100% sure.

This patch has been tested on a TQM8548 modules with the NAND chip
Micron MT29F8G08FABWP.

This patch is based on the following patches posted to this list a few
minutes ago:

  PPC: add accessor macros to clear and set bits in one shot
  83xx/85xx/86xx: add more MxMR local bus definitions

Signed-off-by: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
Acked-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nand: FSL UPM NAND driver</title>
<updated>2008-01-16T13:14:40+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2008-01-14T20:09:32+00:00</published>
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<content type='text'>
Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
</content>
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<pre>
Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
</pre>
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</content>
</entry>
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