u-boot.git/include/linux/mtd, branch master

mtd: spinand: add support for FudanMicro FM25S01A

2025-11-18T19:07:41+00:00

Add support for FudanMicro FM25S01A SPI NAND.

This driver is ported from linux v6.18 and tested on a MT7981 board.

Link: https://lore.kernel.org/linux-mtd/20250824170013.3328777-1-cnsztl@gmail.com/
Reviewed-by: Mikhail Kshevetskiy 
Signed-off-by: Tianling Shen

mtd: Add function prototype for mtd_read_oob_bf(...)

2025-10-28T18:19:04+00:00

The function mtd_read_oob_bf is called by cmd/nand.c but does not have a
prototype in any header. Add this to include/linux/mtd/mtd.h as that is
the most logical place currently.

Fixes: 1fac57720719 ("nand: Add a watch command")
Signed-off-by: Tom Rini

mtd: spinand: Sync core code and device support with Linux 6.17-rc1

2025-10-05T18:26:30+00:00

This makes the U-Boot SPI NAND driver almost the same as in Linux
6.17-rc1. The only major differences are:
 * support of ECC engines. The Linux driver supports different ECC
   engines while U-Boot uses on-die ECC only.
 * per operation maximum SPI bus frequency

Signed-off-by: Mikhail Kshevetskiy 
Reviewed-by: Frieder Schrempf 
Signed-off-by: Michael Trimarchi

mtd: spinand: Add a ->configure_chip() hook

2025-10-05T18:26:27+00:00

There is already a manufacturer hook, which is manufacturer specific but
not chip specific. We no longer have access to the actual NAND identity
at this stage so let's add a per-chip configuration hook to align the
chip configuration (if any) with the core's setting.

This is a port of linux commit
da55809ebb45 ("mtd: spinand: Add a ->configure_chip() hook")

Signed-off-by: Miquel Raynal 
Signed-off-by: Mikhail Kshevetskiy  # U-Boot port
Reviewed-by: Frieder Schrempf 
Signed-off-by: Michael Trimarchi

mtd: spinand: add OTP support

2025-10-05T18:26:19+00:00

The code was ported from linux-6.15

based on a linux commit c06b1f753bea (mtd: spinand: add OTP support)
created by Martin Kurbanov 

Signed-off-by: Mikhail Kshevetskiy 
Reviewed-by: Frieder Schrempf 
Signed-off-by: Michael Trimarchi

mtd: spinand: Add read retry support

2025-10-05T18:26:17+00:00

When the host ECC fails to correct the data error of NAND device,
there's a special read for data recovery method which can be setup
by the host for the next read. There are several retry levels that
can be attempted until the lost data is recovered or definitely
assumed lost.

This is the port of linux commit
f2cb43c98010 (mtd: spinand: Add read retry support)

Signed-off-by: Cheng Ming Lin 
Signed-off-by: Miquel Raynal 
Signed-off-by: Mikhail Kshevetskiy  # U-Boot port
Reviewed-by: Frieder Schrempf 
Signed-off-by: Michael Trimarchi

mtd: spinand: add support of continuous reading mode

2025-10-05T18:26:15+00:00

The code was ported from linux-6.12. The original continuous reading
support was implemented by Miquel Raynal 
in linux commit 631cfdd0520d (mtd: spi-nand: Add continuous read support).

Here is an original patch description:
--------------------------------------
A regular page read consist in:
- Asking one page of content from the NAND array to be loaded in the
  chip's SRAM,
- Waiting for the operation to be done,
- Retrieving the data (I/O phase) from the chip's SRAM.

When reading several sequential pages, the above operation is repeated
over and over. There is however a way to optimize these accesses, by
enabling continuous reads. The feature requires the NAND chip to have a
second internal SRAM area plus a bit of additional internal logic to
trigger another internal transfer between the NAND array and the second
SRAM area while the I/O phase is ongoing. Once the first I/O phase is
done, the host can continue reading more data, continuously, as the chip
will automatically switch to the second SRAM content (which has already
been loaded) and in turns trigger the next load into the first SRAM area
again.

From an instruction perspective, the command op-codes are different, but
the same cycles are required. The only difference is that after a
continuous read (which is stopped by a CS deassert), the host must
observe a delay of tRST. However, because there is no guarantee in Linux
regarding the actual state of the CS pin after a transfer (in order to
speed-up the next transfer if targeting the same device), it was
necessary to manually end the continuous read with a configuration
register write operation.

Continuous reads have two main drawbacks:
* They only work on full pages (column address ignored)
* Only the main data area is pulled, out-of-band bytes are not
  accessible. Said otherwise, the feature can only be useful with on-die
  ECC engines.

Performance wise, measures have been performed on a Zynq platform using
Macronix SPI-NAND controller with a Macronix chip (based on the
flash_speed tool modified for testing sequential reads):
- 1-1-1 mode: performances improved from +3% (2-pages) up to +10% after
              a dozen pages.
- 1-1-4 mode: performances improved from +15% (2-pages) up to +40% after
              a dozen pages.

This series is based on a previous work from Macronix engineer Jaime
Liao.
--------------------------------------

Signed-off-by: Mikhail Kshevetskiy 
Reviewed-by: Frieder Schrempf 
Signed-off-by: Michael Trimarchi

mtd: spinand: Introduce a way to avoid raw access

2025-10-05T18:26:13+00:00

SkyHigh spinand device has ECC enable bit in configuration register but
it must be always enabled. If ECC is disabled, read and write ops
results in undetermined state. For such devices, a way to avoid raw
access is needed.

Introduce SPINAND_NO_RAW_ACCESS flag to advertise the device does not
support raw access. In such devices, the on-die ECC engine ops returns
error to I/O request in raw mode.

Checking and marking BBM need to be cared as special case, by adding
fallback mechanism that tries read/write OOB with ECC enabled.

This is a port of linux commit
6d9d6ab3a82a (mtd: spinand: Introduce a way to avoid raw access)

Signed-off-by: Takahiro Kuwano 
Signed-off-by: Miquel Raynal 
Signed-off-by: Mikhail Kshevetskiy  # U-Boot port
Reviewed-by: Frieder Schrempf 
Signed-off-by: Michael Trimarchi

mtd: spinand: Add support for setting plane select bits

2025-10-05T18:26:08+00:00

Add two flags for inserting the Plane Select bit into the column
address during the write_to_cache and the read_from_cache operation.

Add the SPINAND_HAS_PROG_PLANE_SELECT_BIT flag for serial NAND flash
that require inserting the Plane Select bit into the column address
during the write_to_cache operation.

Add the SPINAND_HAS_READ_PLANE_SELECT_BIT flag for serial NAND flash
that require inserting the Plane Select bit into the column address
during the read_from_cache operation.

This is a port of linux commit
ca229bdbef29 (mtd: spinand: Add support for setting plane select bits)

Signed-off-by: Cheng Ming Lin 
Signed-off-by: Miquel Raynal 
Link: https://lore.kernel.org/linux-mtd/20240909092643.2434479-2-linchengming884@gmail.com
Signed-off-by: Mikhail Kshevetskiy  # U-Boot port
Reviewed-by: Frieder Schrempf 
Signed-off-by: Michael Trimarchi

mtd: spinand: Sync core code and device support with Linux 6.10

2025-10-05T18:26:03+00:00

This makes the U-Boot SPI NAND driver almost the same as in Linux 6.10.
The only major difference is support of ECC engines. The Linux driver
supports different ECC engines while U-Boot uses on-die ECC only.

Signed-off-by: Mikhail Kshevetskiy 
Reviewed-by: Frieder Schrempf 
Signed-off-by: Michael Trimarchi