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<title>u-boot.git/include/linux/mtd, branch v2013.07-rc3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-nand-flash</title>
<updated>2013-05-31T22:28:47+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2013-05-31T22:28:47+00:00</published>
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<entry>
<title>mtd: resync with Linux-3.7.1</title>
<updated>2013-05-31T22:12:03+00:00</updated>
<author>
<name>Sergey Lapin</name>
<email>slapin@ossfans.org</email>
</author>
<published>2013-01-14T03:46:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=dfe64e2c89731a3f9950d7acd8681b68df2bae03'/>
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This patch is essentially an update of u-boot MTD subsystem to
the state of Linux-3.7.1 with exclusion of some bits:

- the update is concentrated on NAND, no onenand or CFI/NOR/SPI
flashes interfaces are updated EXCEPT for API changes.

- new large NAND chips support is there, though some updates
have got in Linux-3.8.-rc1, (which will follow on top of this patch).

To produce this update I used tag v3.7.1 of linux-stable repository.

The update was made using application of relevant patches,
with changes relevant to U-Boot-only stuff sticked together
to keep bisectability. Then all changes were grouped together
to this patch.

Signed-off-by: Sergey Lapin &lt;slapin@ossfans.org&gt;
[scottwood@freescale.com: some eccstrength and build fixes]
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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This patch is essentially an update of u-boot MTD subsystem to
the state of Linux-3.7.1 with exclusion of some bits:

- the update is concentrated on NAND, no onenand or CFI/NOR/SPI
flashes interfaces are updated EXCEPT for API changes.

- new large NAND chips support is there, though some updates
have got in Linux-3.8.-rc1, (which will follow on top of this patch).

To produce this update I used tag v3.7.1 of linux-stable repository.

The update was made using application of relevant patches,
with changes relevant to U-Boot-only stuff sticked together
to keep bisectability. Then all changes were grouped together
to this patch.

Signed-off-by: Sergey Lapin &lt;slapin@ossfans.org&gt;
[scottwood@freescale.com: some eccstrength and build fixes]
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>mtd: nand: add driver for diskonchip g4 nand flash</title>
<updated>2013-05-05T21:47:05+00:00</updated>
<author>
<name>Mike Dunn</name>
<email>mikedunn@newsguy.com</email>
</author>
<published>2013-04-12T18:59:18+00:00</published>
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This patch adds a driver for the diskonchip G4 nand flash device.  It is based
on the driver from the linux kernel.

This also includes a separate SPL driver.  A separate SPL driver is used because
the device operates in a different mode (reliable mode) when loading a boot
image, and also because the storage format of the boot image is different from
normal data (pages are stored redundantly).  The SPL driver basically mimics how
a typical IPL reads data from the device.  The special operating mode and
storage format are used to compensate for the fact that the IPL does not contain
the BCH ecc decoding algorithm (due to size constraints).  Although the u-boot
SPL *could* use ecc, it operates like an IPL for the sake of simplicity and
uniformity, since the IPL and SPL share the task of loading the u-boot image.
As a side benefit, the SPL driver is very small.

[port from linux kernel 3.4 commit 570469f3bde7f71cc1ece07a18d54a05b6a8775d]

Signed-off-by: Mike Dunn &lt;mikedunn@newsguy.com&gt;
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This patch adds a driver for the diskonchip G4 nand flash device.  It is based
on the driver from the linux kernel.

This also includes a separate SPL driver.  A separate SPL driver is used because
the device operates in a different mode (reliable mode) when loading a boot
image, and also because the storage format of the boot image is different from
normal data (pages are stored redundantly).  The SPL driver basically mimics how
a typical IPL reads data from the device.  The special operating mode and
storage format are used to compensate for the fact that the IPL does not contain
the BCH ecc decoding algorithm (due to size constraints).  Although the u-boot
SPL *could* use ecc, it operates like an IPL for the sake of simplicity and
uniformity, since the IPL and SPL share the task of loading the u-boot image.
As a side benefit, the SPL driver is very small.

[port from linux kernel 3.4 commit 570469f3bde7f71cc1ece07a18d54a05b6a8775d]

Signed-off-by: Mike Dunn &lt;mikedunn@newsguy.com&gt;
</pre>
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</entry>
<entry>
<title>Consolidate bool type</title>
<updated>2013-04-01T20:33:52+00:00</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2013-04-01T18:29:11+00:00</published>
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<id>472d546054dadacca91530bad42ad06f6408124e</id>
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'bool' is defined in random places. This patch consolidates them into a
single header file include/linux/types.h, using stdbool.h introduced in C99.

All other #define, typedef and enum are removed. They are all consistent with
true = 1, false = 0.

Replace FALSE, False with false. Replace TRUE, True with true.
Skip *.py, *.php, lib/* files.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
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'bool' is defined in random places. This patch consolidates them into a
single header file include/linux/types.h, using stdbool.h introduced in C99.

All other #define, typedef and enum are removed. They are all consistent with
true = 1, false = 0.

Replace FALSE, False with false. Replace TRUE, True with true.
Skip *.py, *.php, lib/* files.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>nand: Move the sub-page read support enable to a flag</title>
<updated>2012-11-26T21:41:28+00:00</updated>
<author>
<name>Joe Hershberger</name>
<email>joe.hershberger@ni.com</email>
</author>
<published>2012-11-05T06:46:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c788ecfdc3eb577757ffc1bfb8416added07ef33'/>
<id>c788ecfdc3eb577757ffc1bfb8416added07ef33</id>
<content type='text'>
Use a flag instead of a hard-coded macro so that sub-page reads can be
enabled in other cases (such as on-die ecc).

This is the same as a5ff4f102937a3492bca4a9ff0c341d78813414c in Linux

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
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Use a flag instead of a hard-coded macro so that sub-page reads can be
enabled in other cases (such as on-die ecc).

This is the same as a5ff4f102937a3492bca4a9ff0c341d78813414c in Linux

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>include/linux/compat.h: fix warning: preprocessor token {__iomem, __user} redefined</title>
<updated>2012-11-04T18:00:34+00:00</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2012-10-29T13:34:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0d4c1c91bb2852ff6f4e46f40e72e74ec10599c5'/>
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include/linux/compat.h:4:9: warning: preprocessor token __user redefined
include/linux/compiler.h:7:10: this was the original definition
include/linux/compat.h:5:9: warning: preprocessor token __iomem redefined
include/linux/compiler.h:12:10: this was the original definition

fixup __iomem, __user definitions in compat.h code appears to be placed
there as a cover up from a code import from linux when u-boot didn't yet
have a compiler.h, introduced by commit
932394ac43e2e778e664eeb6e456fecd0fae6e59 "Rewrite of NAND code based on
what is in 2.6.12 Linux kernel".

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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include/linux/compat.h:4:9: warning: preprocessor token __user redefined
include/linux/compiler.h:7:10: this was the original definition
include/linux/compat.h:5:9: warning: preprocessor token __iomem redefined
include/linux/compiler.h:12:10: this was the original definition

fixup __iomem, __user definitions in compat.h code appears to be placed
there as a cover up from a code import from linux when u-boot didn't yet
have a compiler.h, introduced by commit
932394ac43e2e778e664eeb6e456fecd0fae6e59 "Rewrite of NAND code based on
what is in 2.6.12 Linux kernel".

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-arm</title>
<updated>2012-09-21T21:53:13+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2012-09-21T21:53:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=495dbd72dd1172de866ba323263a5b62cf454972'/>
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<entry>
<title>mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver</title>
<updated>2012-09-17T23:54:43+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2012-08-30T13:39:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9c790a748f6b61e36f7aaf0c8d5ed35c9b09f454'/>
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This is based on Linux kernel -next:

commit 14f44abf1dafc20ba42ce8616a8fc8fbd1b3712b
Author: Brian Norris &lt;computersforpeace@gmail.com&gt;
Date:   Fri Jul 13 09:28:24 2012 -0700

    mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver

    The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It
    silently masks off at least one flag that might be set by the driver
    (NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly
    others.

    Really, as long as driver writers exercise a small amount of care with
    NAND_* options, this mask is not necessary at all; it was only here to
    prevent certain options from accidentally being set by the driver. But the
    original thought turns out to be a bad idea occasionally. Thus, kill it.

    Note, this patch fixes some major gpmi-nand breakage.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Brian Norris &lt;computersforpeace@gmail.com&gt;
Cc: Eric Nelson &lt;eric.nelson@boundarydevices.com&gt;
Cc: Fabio Estevam &lt;festevam@gmail.com&gt;
Cc: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
Cc: Scott Wood &lt;scottwood@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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This is based on Linux kernel -next:

commit 14f44abf1dafc20ba42ce8616a8fc8fbd1b3712b
Author: Brian Norris &lt;computersforpeace@gmail.com&gt;
Date:   Fri Jul 13 09:28:24 2012 -0700

    mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver

    The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It
    silently masks off at least one flag that might be set by the driver
    (NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly
    others.

    Really, as long as driver writers exercise a small amount of care with
    NAND_* options, this mask is not necessary at all; it was only here to
    prevent certain options from accidentally being set by the driver. But the
    original thought turns out to be a bad idea occasionally. Thus, kill it.

    Note, this patch fixes some major gpmi-nand breakage.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Brian Norris &lt;computersforpeace@gmail.com&gt;
Cc: Eric Nelson &lt;eric.nelson@boundarydevices.com&gt;
Cc: Fabio Estevam &lt;festevam@gmail.com&gt;
Cc: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
Cc: Scott Wood &lt;scottwood@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>nand: consolidate duplicated constants</title>
<updated>2012-09-17T22:33:42+00:00</updated>
<author>
<name>Joe Hershberger</name>
<email>joe.hershberger@ni.com</email>
</author>
<published>2012-08-22T21:49:44+00:00</published>
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NAND_CMD_ constants for lock/unlock should be in the header

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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NAND_CMD_ constants for lock/unlock should be in the header

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>nand: Try to align the default buffers</title>
<updated>2012-09-07T20:54:30+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-07-29T20:53:25+00:00</published>
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The NAND layer needs to use cache-aligned buffers by default. Towards this
goal. align the default buffers and their members according to the minimum
DMA alignment defined for the architecture.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Acked-by: Scott Wood &lt;scottwood@freescale.com&gt;
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The NAND layer needs to use cache-aligned buffers by default. Towards this
goal. align the default buffers and their members according to the minimum
DMA alignment defined for the architecture.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Acked-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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