u-boot.git/include/linux/mtd, branch v2021.10

mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interface

2021-09-28T16:03:21+00:00

nand_dt_init() is still using fdtdec_xx() interface.
If OF_LIVE flag is enabled, dt property can't be get anymore.
Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue.

For doing this, node parameter type must be ofnode.

First idea was to convert "node" parameter to ofnode type inside
nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode()
is not bijective, in case OF_LIVE flag is enabled, it performs an assert().

So, this leads to update nand_chip struct flash_node field from int to
ofnode and to update all nand_dt_init() callers.

Signed-off-by: Patrice Chotard

mtd: spi: nor: force mtd name to "nor%d"

2021-09-28T16:03:20+00:00

Force the mtd name of spi-nor to "nor" + the driver sequence number:
"nor0", "nor1"... beginning after the existing nor devices.

This patch is coherent with existing "nand" and "spi-nand"
mtd device names.

When CFI MTD NOR device are supported, the spi-nor index is chosen after
the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS.

When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config
is replaced by to cfi_flash_num_flash_banks in the include file
mtd/cfi_flash.h.

This generic name "nor%d" can be use to identify the mtd spi-nor device
without knowing the real device name or the DT path of the device,
used with API get_mtd_device_nm() and is used in mtdparts command.

This patch also avoids issue when the same NOR device is present 2 times,
for example on STM32MP15F-EV1:

STM32MP> mtd list
SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \
total 64 MiB

List of MTD devices:
* nand0
  - type: NAND flash
  - block size: 0x40000 bytes
  - min I/O: 0x1000 bytes
  - OOB size: 224 bytes
  - OOB available: 118 bytes
  - ECC strength: 8 bits
  - ECC step size: 512 bytes
  - bitflip threshold: 6 bits
  - 0x000000000000-0x000040000000 : "nand0"
* mx66l51235l
  - device: mx66l51235l@0
  - parent: spi@58003000
  - driver: jedec_spi_nor
  - path: /soc/spi@58003000/mx66l51235l@0
  - type: NOR flash
  - block size: 0x10000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "mx66l51235l"
* mx66l51235l
  - device: mx66l51235l@1
  - parent: spi@58003000
  - driver: jedec_spi_nor
  - path: /soc/spi@58003000/mx66l51235l@1
  - type: NOR flash
  - block size: 0x10000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "mx66l51235l"

The same mtd name "mx66l51235l" identify the 2 instances
mx66l51235l@0 and mx66l51235l@1.

This patch fixes a ST32CubeProgrammer / stm32prog command issue
with nor0 target on STM32MP157C-EV1 board introduced by
commit b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when
DM is enabled").

Fixes: b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled")
Signed-off-by: Patrick Delaunay 
[trini: Add  to  for DM_MAX_SEQ_STR]
Signed-off-by: Tom Rini

mtd: remove SPEAr flash driver st_smi

2021-09-24T16:09:47+00:00

Remove the driver st_smic.c used in SPEAr products and the associated
config CONFIG_ST_SMI; this driver is no more used in U-Boot after the
commit 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr
support").

Fixes: 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay 
Reviewed-by: Stefan Roese 
Reviewed-by: Tom Rini

mtd: spi-nor-core: Add fixups for Cypress s25hl-t/s25hs-t

2021-06-29T13:46:54+00:00

The nor->ready() and spansion_sr_ready() introduced earlier in this
series are used for multi-die package parts.

The nor->quad_enable() sets the volatile QE bit on each die.

The nor->erase() is hooked if the device is not configured to uniform
sectors, assuming it has 32 x 4KB sectors overlaid on bottom address.
Other configurations, top and split, are not supported at this point.
Will submit additional patches to support it as needed.

The post_bfpt/sfdp() fixes the params wrongly advertised in SFDP.

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Jagan Teki

mtd: spi-nor-core: Add Cypress manufacturer ID in set_4byte

2021-06-29T13:46:54+00:00

Cypress chips support SPINOR_OP_EN4B(B7h) to enable 4-byte addressing mode.

Cypress chips support B8h to disable 4-byte addressing mode instead of
SPINOR_OP_EX4B(E9h).

This patch defines new opcode and updates set_4byte() to support
enable/disable 4-byte addressing mode for Cypress chips.

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Jagan Teki

mtd: spi-nor-core: Read status by Read Any Register

2021-06-29T13:46:54+00:00

The spansion_sr_ready() reads status register 1 by Read Any Register
commnad. This function is called from Flash specific hook with die address
and dummy cycles to support multi-die package parts from Spansion/Cypress.

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Pratyush Yadav 
Reviewed-by: Jagan Teki

mtd: spi-nor-core: Add the ->ready() hook

2021-06-29T13:46:54+00:00

For dual/quad die package devices from Spansion/Cypress, the device's
status needs to be checked by reading status registers in all dies, by
using Read Any Register command. To support this, a Flash specific hook
that can overwrite the legacy status check is needed.

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Pratyush Yadav 
Reviewed-by: Jagan Teki

mtd: spi-nor-core: Add support for volatile QE bit

2021-06-29T13:46:54+00:00

Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad Enable bit in CFR1
volatile.

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Jagan Teki

mtd: spi-nor-core: Add support for Read/Write Any Register

2021-06-29T13:46:54+00:00

Some of Spansion/Cypress chips support Read/Write Any Register commands.
These commands are mainly used to write volatile registers and access to
the registers in second and subsequent die for multi-die package parts.

The Read Any Register instruction (65h) is followed by register address
and dummy cycles, then the selected register byte is returned.

The Write Any Register instruction (71h) is followed by register address
and register byte to write.

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Pratyush Yadav 
Reviewed-by: Jagan Teki

mtd: spi-nor: Add Cypress manufacturer ID

2021-06-29T13:46:54+00:00

This patch adds Cypress manufacturer ID (34h) definition.

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Pratyush Yadav 
Reviewed-by: Jagan Teki