u-boot.git/include/linux/mtd, branch v2024.07-rc2

common: Convert *.c/h from UTF-8 to ASCII enconfing

2024-04-22T17:01:48+00:00

Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or
names are converted.

Signed-off-by: Michal Simek 
Reviewed-by: Tom Rini 
Acked-by: Marek Behún

mtd: spinand: Add support for XTX SPINAND

2024-04-14T06:49:40+00:00

Add support for XTX XT26G0xA and XT26xxxD. The driver is ported from
linux-6.7.1. This driver is tested on Banana BPI-R3 with XT26G01A and
XT26G12D.

Link: https://lore.kernel.org/all/20240312014314.15454-1-bruce_suen@163.com
Signed-off-by: Bruce Suen 
Reviewed-by: Frieder Schrempf 
Signed-off-by: Dario Binacchi

mtd: nand: raw: Port another option flag from Linux

2024-04-14T06:49:40+00:00

Introduced in upstream Linux with commit 7a08dbaedd365 for release v5.0.

When the new atmel nand driver was backported to U-Boot with commit
6a8dfd57220d ("nand: atmel: Add DM based NAND driver") that definition
was added to the driver instead of the header file.  Move it over to the
other definitions with the same help text it has in Linux.

Code actually using this has not been ported over to raw nand base yet.

Link: https://lore.kernel.org/all/20240320090214.40465-3-ada@thorsis.com
Signed-off-by: Alexander Dahl 
Reviewed-by: Michael Trimarchi 
Signed-off-by: Dario Binacchi

mtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable()

2024-01-29T14:04:17+00:00

Enabling Octal DTR mode in multi-die package parts requires reister setup
for each die. That can be done by simple for-loop. write_enable() takes
effect to all die at once so we can call it before the loop. Besides we
can replace spi_mem_exec_op() calls with spansion_read/write_any_reg().
And finally, we must mask CFR2V[7:4] when changing dummy cycles, as
CFR2V[7] indicates current addressing mode and that should be 1 (4-byte
address mode) for multi-die package parts.

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Jagan Teki

mtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28

2024-01-29T14:04:17+00:00

Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode.
Instead, it supports CLPEF(0x82) which has the same functionality as CLSR.
spansion_sr_ready() is for multi-die package parts including S28HS02GT, so
we need to use CLPEF instead of CLSR.

This change does not affect to S25x02GT which uses spansion_sr_ready() as
S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30).

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Jagan Teki

mtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28

2024-01-29T14:04:17+00:00

s25_erase_non_uniform() and s28hx_t_erase_uniform() support hybrid sector
layout (32 x 4KB sectors overlaid at bottom address) and doing same thing.
Consolidate them into single helper named s25_s28_erase_non_uniform().

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Jagan Teki

mtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28

2024-01-29T14:04:17+00:00

Some macro definitions used in Infineon(Cypress) S25 and S28 series are
redundant and some have inconsistent prefix. This patch removes
redundant ones and renames some to have same prefix as others.

Signed-off-by: Takahiro Kuwano 
Reviewed-by: Jagan Teki

Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi into next

2023-12-18T14:56:42+00:00

- spi_nor_read_sfdp_dma_unsafe (Vaishnav)
- w25q01/02 (Jim)

mtd: spinand: add support for ESMT F50x1G41LB

2023-12-14T18:20:00+00:00

Adaptation of Linux commit d74c36480a67

This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
It seems that ESMT likes to use random JEDEC ID from other vendors.
Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
JEDEC ID in variable name.

Datasheets:
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf

Signed-off-by: Igor Prusov 
Signed-off-by: Chuanhong Guo 
Signed-off-by: Martin Kurbanov 
Signed-off-by: Dmitry Rokosov 
Tested-by: Martin Kurbanov 
Reviewed-by: Frieder Schrempf 
Reviewed-by: Jagan Teki

Merge patch series "nand: Add sandbox tests"

2023-11-16T18:49:13+00:00

To quote the author:

This series tests raw nand flash in sandbox and fixes various bugs discovered in
the process. I've tried to do things in a contemporary manner, avoiding the
(numerous) variations present on only a few boards. The test is pretty minimal.
Future work could test the rest of the nand API as well as the MTD API.

Bloat (for v1) at [1] (for boards with SPL_NAND_SUPPORT enabled). Almost
everything grows by a few bytes due to nand_page_size. A few boards grow more,
mostly those using nand_spl_loaders.c. CI at [2].

[1] https://gist.github.com/Forty-Bot/9694f3401893c9e706ccc374922de6c2
[2] https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/18443