u-boot.git/include/linux/usb/dwc3.h, branch v2018.03 Unnamed repository; edit this file 'description' to name the repository. drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller 2016-09-27T21:30:49+00:00 Sriram Dash sriram.dash@nxp.com 2016-09-23T07:27:52+00:00 4c043712e9910ef1d612aedbd8304a1f7348ef5f Currently the controller by default enables the Receive Detect feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive detection in P3 mode. Enabling the USB3 controller to configure USB in P2 mode whenever the Receive Detect feature is required. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> 
Currently the controller by default enables the Receive Detect feature in P3
mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive
detection in P3 mode.
Enabling the USB3 controller to configure USB in P2 mode whenever the Receive
Detect feature is required.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
usb: xhci-rockchip: add rockchip dwc3 controller driver 2016-09-22T13:32:22+00:00 MengDongyang daniel.meng@rock-chips.com 2016-08-24T04:02:17+00:00 b44566c4ce5ca95264860f78a6ba1d26a5edb5ea This patch add support for rockchip dwc3 controller, which corresponding to the two type-C port on rk3399 evb. Only support usb2.0 currently for we have not enable the usb3.0 phy driver and PD(fusb302) driver. Signed-off-by: MengDongyang <daniel.meng@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> 
This patch add support for rockchip dwc3 controller, which corresponding
to the two type-C port on rk3399 evb.
Only support usb2.0 currently for we have not enable the usb3.0 phy
driver and PD(fusb302) driver.

Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
usb: xhci: zynqmp: Removing unused function usb_phy_reset 2015-12-06T23:15:00+00:00 Marek Vasut marex@denx.de 2015-12-02T14:28:26+00:00 6af4e2782d1300015ab1c3c28e9faa5c96d93f19 This patch removes unsued function usb_phy_reset, rather common function dwc3_phy_reset is used. Signed-off-by: Marek Vasut <marex@denx.de> 
This patch removes unsued function usb_phy_reset, rather common function
dwc3_phy_reset is used.

Signed-off-by: Marek Vasut <marex@denx.de>
drivers: usb: fsl: Implement Erratum A-009116 for XHCI controller 2015-07-22T06:55:45+00:00 Nikhil Badola nikhil.badola@freescale.com 2015-06-23T03:47:49+00:00 667f4dd90f0f40f8d4fde7ef280550ef5f7946f8 This adjusts (micro)frame length to appropriate value thus avoiding USB devices to time out over a longer run Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> 
This adjusts (micro)frame length to appropriate value thus
avoiding USB devices to time out over a longer run

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
usb: dwc3: Add DWC3 controller driver support 2015-07-22T06:55:44+00:00 Ramneek Mehresh ramneek.mehresh@freescale.com 2015-05-29T09:17:15+00:00 dc9cdf859e11de775e75cc233b09d6b6d257a818 Add support for DWC3 XHCI controller driver Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> 
Add support for DWC3 XHCI controller driver

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
keystone: usb: add support of usb xhci 2014-10-23T15:27:04+00:00 WingMan Kwok w-kwok2@ti.com 2014-09-05T19:26:23+00:00 bc0e8d7c5d189c1566a73affad0087ccbe511bc9 Add support of usb xhci. xHCI controls all USB speeds of the Host mode, that is, the SS through the SS PHY, as well as the HS, FS, and LS through the USB2 PHY. xHCI replaces and supersedes all previous host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not backwards compatible with any of them. The USB3SS’s USB Controller is fully compliant with xHC. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: WingMan Kwok <w-kwok2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> 
Add support of usb xhci. xHCI controls all USB speeds of the Host
mode, that is, the SS through the SS PHY, as well as the HS, FS, and
LS through the USB2 PHY. xHCI replaces and supersedes all previous
host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not
backwards compatible with any of them. The USB3SS’s USB Controller is
fully compliant with xHC.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
USB: XHCI: Add xHCI host controller support for Exynos5 2013-10-20T21:42:38+00:00 Vivek Gautam gautam.vivek@samsung.com 2013-09-14T08:32:46+00:00 13194f3b5f51d104bdfdd7ff5a7556136b6dc35c This adds driver layer for xHCI controller in Samsung's exynos5 soc. This interacts with xHCI host controller stack. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> 
This adds driver layer for xHCI controller in Samsung's
exynos5 soc. This interacts with xHCI host controller stack.

Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>