u-boot.git/include/linux, branch v2018.03-rc3

libfdt: fix

2018-01-28T17:27:30+00:00

I do not remember why, but this is apparently a file-copy mistake.
The file name is libfdt.h, but its content is that of libfdt_env.h

Re-import it from upstream Linux.

Signed-off-by: Masahiro Yamada 
Reviewed-by: Simon Glass

linux/kernel.h: Add ALIGN_DOWN macro

2018-01-10T13:05:51+00:00

Follow Linux commit ed067d4a859f ("linux/kernel.h: Add ALIGN_DOWN
macro").

Signed-off-by: Masahiro Yamada

mtd: nand: include from include/linux/mtd/rawnand.h

2017-12-04T13:00:01+00:00

This is needed for ARCH_DMA_MINALIGN.

Signed-off-by: Masahiro Yamada

mtd: nand: Rename nand.h into rawnand.h

2017-12-04T13:00:00+00:00

This header was renamed to rawnand.h in Linux.

The following is the corresponding commit in Linux.

  commit d4092d76a4a4e57b65910899948a83cc8646c5a5
  Author: Boris Brezillon 
  Date:   Fri Aug 4 17:29:10 2017 +0200

      mtd: nand: Rename nand.h into rawnand.h

      We are planning to share more code between different NAND based
      devices (SPI NAND, OneNAND and raw NANDs), but before doing that
      we need to move the existing include/linux/mtd/nand.h file into
      include/linux/mtd/rawnand.h so we can later create a nand.h header
      containing all common structure and function prototypes.

Signed-off-by: Masahiro Yamada

mtd: nand: introduce NAND_ROW_ADDR_3 flag

2017-11-28T15:28:59+00:00

Several drivers check ->chipsize to see if the third row address cycle
is needed.  Instead of embedding magic sizes such as 32MB, 128MB in
drivers, introduce a new flag NAND_ROW_ADDR_3 for clean-up.  Since
nand_scan_ident() knows well about the device, it can handle this
properly.  The flag is set if the row address bit width is greater
than 16.

Delete comments such as "One more address cycle for ..." because
intention is now clear enough from the code.

Signed-off-by: Masahiro Yamada 
Acked-by: Wenyou Yang 
Signed-off-by: Boris Brezillon 

[Linux commit: 14157f861437ebe2d624b0a845b91bbdf8ca9a2d]

mtd: nand: add a shorthand to generate nand_ecc_caps structure

2017-11-28T15:28:59+00:00

struct nand_ecc_caps was designed as flexible as possible to support
multiple stepsizes (like sunxi_nand.c).

So, we need to write multiple arrays even for the simplest case.
I guess many controllers support a single stepsize, so here is a
shorthand macro for the case.

It allows to describe like ...

NAND_ECC_CAPS_SINGLE(denali_pci_ecc_caps, denali_calc_ecc_bytes, 512, 8, 15);

... instead of

static const int denali_pci_ecc_strengths[] = {8, 15};
static const struct nand_ecc_step_info denali_pci_ecc_stepinfo = {
        .stepsize = 512,
        .strengths = denali_pci_ecc_strengths,
        .nstrengths = ARRAY_SIZE(denali_pci_ecc_strengths),
};
static const struct nand_ecc_caps denali_pci_ecc_caps = {
        .stepinfos = &denali_pci_ecc_stepinfo,
        .nstepinfos = 1,
        .calc_ecc_bytes = denali_calc_ecc_bytes,
};

Signed-off-by: Masahiro Yamada 
Signed-off-by: Boris Brezillon 

[Linux commit: a03c60178c181767ecfb26fb311a88742d228118]

mtd: nand: add generic helpers to check, match, maximize ECC settings

2017-11-28T15:28:59+00:00

Driver are responsible for setting up ECC parameters correctly.
Those include:
  - Check if ECC parameters specified (usually by DT) are valid
  - Meet the chip's ECC requirement
  - Maximize ECC strength if NAND_ECC_MAXIMIZE flag is set

The logic can be generalized by factoring out common code.

This commit adds 3 helpers to the NAND framework:
nand_check_ecc_caps - Check if preset step_size and strength are valid
nand_match_ecc_req - Match the chip's requirement
nand_maximize_ecc - Maximize the ECC strength

To use the helpers above, a driver needs to provide:
  - Data array of supported ECC step size and strength
  - A hook that calculates ECC bytes from the combination of
    step_size and strength.

By using those helpers, code duplication among drivers will be
reduced.

Signed-off-by: Masahiro Yamada 
Signed-off-by: Boris Brezillon 

[Linux commit: 2c8f8afa7f92acb07641bf95b940d384ed1d0294]

mtd: nand: Pass the CS line to ->setup_data_interface()

2017-11-28T15:28:59+00:00

Some NAND controllers can assign different NAND timings to different
CS lines. Pass the CS line information to ->setup_data_interface() so
that the NAND controller driver knows which CS line is concerned by
the setup_data_interface() request.

Signed-off-by: Boris Brezillon 
[Linux commit: 104e442a67cfba4d0cc982384761befb917fb6a1]
Signed-off-by: Masahiro Yamada

mtd: nand: allow drivers to request minimum alignment for passed buffer

2017-11-28T15:28:59+00:00

In some cases, nand_do_{read,write}_ops is passed with unaligned
ops->datbuf.  Drivers using DMA will be unhappy about unaligned
buffer.

The new struct member, buf_align, represents the minimum alignment
the driver require for the buffer.  If the buffer passed from the
upper MTD layer does not have enough alignment, nand_do_*_ops will
use bufpoi.

Signed-off-by: Masahiro Yamada 
Signed-off-by: Boris Brezillon 

[Linux commit: 477544c62a84d3bacd9f90ba75ffc16c04d78071]

mtd: nand: Drop the ->errstat() hook

2017-11-28T15:28:58+00:00

The ->errstat() hook is no longer implemented NAND controller drivers.
Get rid of it before someone starts abusing it.

Signed-off-by: Boris Brezillon 
[Linux commit: 7d135bcced20be2b50128432c5426a7278ec4f6d]
[masahiro: modify davinci_nand.c for U-Boot]
Signed-off-by: Masahiro Yamada