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<title>u-boot.git/include/linux, branch v2024.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>mtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable()</title>
<updated>2024-01-29T14:04:17+00:00</updated>
<author>
<name>Takahiro Kuwano</name>
<email>Takahiro.Kuwano@infineon.com</email>
</author>
<published>2023-12-22T05:46:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e70ac288708c006251a80b7b69fc49423f19e454'/>
<id>e70ac288708c006251a80b7b69fc49423f19e454</id>
<content type='text'>
Enabling Octal DTR mode in multi-die package parts requires reister setup
for each die. That can be done by simple for-loop. write_enable() takes
effect to all die at once so we can call it before the loop. Besides we
can replace spi_mem_exec_op() calls with spansion_read/write_any_reg().
And finally, we must mask CFR2V[7:4] when changing dummy cycles, as
CFR2V[7] indicates current addressing mode and that should be 1 (4-byte
address mode) for multi-die package parts.

Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
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<pre>
Enabling Octal DTR mode in multi-die package parts requires reister setup
for each die. That can be done by simple for-loop. write_enable() takes
effect to all die at once so we can call it before the loop. Besides we
can replace spi_mem_exec_op() calls with spansion_read/write_any_reg().
And finally, we must mask CFR2V[7:4] when changing dummy cycles, as
CFR2V[7] indicates current addressing mode and that should be 1 (4-byte
address mode) for multi-die package parts.

Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28</title>
<updated>2024-01-29T14:04:17+00:00</updated>
<author>
<name>Takahiro Kuwano</name>
<email>Takahiro.Kuwano@infineon.com</email>
</author>
<published>2023-12-22T05:46:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9901312e09af0bf51e35628cd8547637c103ed6c'/>
<id>9901312e09af0bf51e35628cd8547637c103ed6c</id>
<content type='text'>
Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode.
Instead, it supports CLPEF(0x82) which has the same functionality as CLSR.
spansion_sr_ready() is for multi-die package parts including S28HS02GT, so
we need to use CLPEF instead of CLSR.

This change does not affect to S25x02GT which uses spansion_sr_ready() as
S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30).

Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
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<pre>
Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode.
Instead, it supports CLPEF(0x82) which has the same functionality as CLSR.
spansion_sr_ready() is for multi-die package parts including S28HS02GT, so
we need to use CLPEF instead of CLSR.

This change does not affect to S25x02GT which uses spansion_sr_ready() as
S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30).

Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28</title>
<updated>2024-01-29T14:04:17+00:00</updated>
<author>
<name>Takahiro Kuwano</name>
<email>Takahiro.Kuwano@infineon.com</email>
</author>
<published>2023-12-22T05:45:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a3a5cc7613ebbbd647ddd0555e0c9a23c340318e'/>
<id>a3a5cc7613ebbbd647ddd0555e0c9a23c340318e</id>
<content type='text'>
s25_erase_non_uniform() and s28hx_t_erase_uniform() support hybrid sector
layout (32 x 4KB sectors overlaid at bottom address) and doing same thing.
Consolidate them into single helper named s25_s28_erase_non_uniform().

Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
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<pre>
s25_erase_non_uniform() and s28hx_t_erase_uniform() support hybrid sector
layout (32 x 4KB sectors overlaid at bottom address) and doing same thing.
Consolidate them into single helper named s25_s28_erase_non_uniform().

Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28</title>
<updated>2024-01-29T14:04:17+00:00</updated>
<author>
<name>Takahiro Kuwano</name>
<email>Takahiro.Kuwano@infineon.com</email>
</author>
<published>2023-12-22T05:45:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a67bc55b91d3763b32c463e5ccbf95de6040d31'/>
<id>7a67bc55b91d3763b32c463e5ccbf95de6040d31</id>
<content type='text'>
Some macro definitions used in Infineon(Cypress) S25 and S28 series are
redundant and some have inconsistent prefix. This patch removes
redundant ones and renames some to have same prefix as others.

Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some macro definitions used in Infineon(Cypress) S25 and S28 series are
redundant and some have inconsistent prefix. This patch removes
redundant ones and renames some to have same prefix as others.

Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>qe: Add &lt;config.h&gt; to linux/immap_qe.h</title>
<updated>2023-12-21T13:54:37+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-12-14T18:16:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=10be393cf0af497a7b71b87afc5a3e3eb8fecdd5'/>
<id>10be393cf0af497a7b71b87afc5a3e3eb8fecdd5</id>
<content type='text'>
Given how we define QE_MURAM_SIZE today, this header needs to have
&lt;config.h&gt; added to it.

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
Given how we define QE_MURAM_SIZE today, this header needs to have
&lt;config.h&gt; added to it.

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi into next</title>
<updated>2023-12-18T14:56:42+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-12-18T14:56:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cd908ba1869de731a1487ec1707de0a312e746be'/>
<id>cd908ba1869de731a1487ec1707de0a312e746be</id>
<content type='text'>
- spi_nor_read_sfdp_dma_unsafe (Vaishnav)
- w25q01/02 (Jim)
</content>
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<pre>
- spi_nor_read_sfdp_dma_unsafe (Vaishnav)
- w25q01/02 (Jim)
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: spinand: add support for ESMT F50x1G41LB</title>
<updated>2023-12-14T18:20:00+00:00</updated>
<author>
<name>Igor Prusov</name>
<email>ivprusov@salutedevices.com</email>
</author>
<published>2023-10-17T19:29:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0f2c632b8cc3fa6986d66f1ec4daefb693e000eb'/>
<id>0f2c632b8cc3fa6986d66f1ec4daefb693e000eb</id>
<content type='text'>
Adaptation of Linux commit d74c36480a67

This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
It seems that ESMT likes to use random JEDEC ID from other vendors.
Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
JEDEC ID in variable name.

Datasheets:
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf

Signed-off-by: Igor Prusov &lt;ivprusov@salutedevices.com&gt;
Signed-off-by: Chuanhong Guo &lt;gch981213@gmail.com&gt;
Signed-off-by: Martin Kurbanov &lt;mmkurbanov@sberdevices.ru&gt;
Signed-off-by: Dmitry Rokosov &lt;ddrokosov@sberdevices.ru&gt;
Tested-by: Martin Kurbanov &lt;mmkurbanov@sberdevices.ru&gt;
Reviewed-by: Frieder Schrempf &lt;frieder.schrempf@kontron.de&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Adaptation of Linux commit d74c36480a67

This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
It seems that ESMT likes to use random JEDEC ID from other vendors.
Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
JEDEC ID in variable name.

Datasheets:
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf

Signed-off-by: Igor Prusov &lt;ivprusov@salutedevices.com&gt;
Signed-off-by: Chuanhong Guo &lt;gch981213@gmail.com&gt;
Signed-off-by: Martin Kurbanov &lt;mmkurbanov@sberdevices.ru&gt;
Signed-off-by: Dmitry Rokosov &lt;ddrokosov@sberdevices.ru&gt;
Tested-by: Martin Kurbanov &lt;mmkurbanov@sberdevices.ru&gt;
Reviewed-by: Frieder Schrempf &lt;frieder.schrempf@kontron.de&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'v2024.01-rc3' into next</title>
<updated>2023-11-20T14:19:50+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-11-20T14:19:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=dca7a8958f8d0dbd53072caa4353353e062d80ca'/>
<id>dca7a8958f8d0dbd53072caa4353353e062d80ca</id>
<content type='text'>
Prepare v2024.01-rc3
</content>
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<pre>
Prepare v2024.01-rc3
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch '2023-11-16-assorted-updates' into next</title>
<updated>2023-11-17T13:38:05+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-11-17T13:38:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ae7ec8b0be41b59ef323f7531c0fe6745e8fef45'/>
<id>ae7ec8b0be41b59ef323f7531c0fe6745e8fef45</id>
<content type='text'>
- squashfs improvements, remove common.h in some places, assorted code
  fixes, fix a few CONFIG symbol names in Kconfig files, bring in
  linux's &lt;linux/time.h&gt; conversion functions, poplar updates, bcb
  improvements.
</content>
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<pre>
- squashfs improvements, remove common.h in some places, assorted code
  fixes, fix a few CONFIG symbol names in Kconfig files, bring in
  linux's &lt;linux/time.h&gt; conversion functions, poplar updates, bcb
  improvements.
</pre>
</div>
</content>
</entry>
<entry>
<title>linux/time.h: Add Linux time conversion defines</title>
<updated>2023-11-16T23:59:58+00:00</updated>
<author>
<name>Igor Prusov</name>
<email>ivprusov@salutedevices.com</email>
</author>
<published>2023-11-09T17:10:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d7ce04c7f4cbae9608287ebd810a411944efff9a'/>
<id>d7ce04c7f4cbae9608287ebd810a411944efff9a</id>
<content type='text'>
Currently there are no defines for time conversion in time.h, which
leads to drivers declaring those locally or not using defines at all, so
add them from Linux.

Signed-off-by: Igor Prusov &lt;ivprusov@salutedevices.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently there are no defines for time conversion in time.h, which
leads to drivers declaring those locally or not using defines at all, so
add them from Linux.

Signed-off-by: Igor Prusov &lt;ivprusov@salutedevices.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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