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<title>u-boot.git/include/mpc512x.h, branch v2009.06</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>ADS5121 Add PATA support</title>
<updated>2009-02-03T22:40:29+00:00</updated>
<author>
<name>Ralph Kondziella</name>
<email>rk@argos-messtechnik.de</email>
</author>
<published>2009-01-26T19:34:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=70a4da45e16b72e8e5b0baaecdaee9be8619647d'/>
<id>70a4da45e16b72e8e5b0baaecdaee9be8619647d</id>
<content type='text'>
Original patch from Ralph Kondziella
plus clean up by Wolfgang Denk
plus changes by John Rigby
    use ips clock not lpc
    port forward to current u-boot release

Signed-off-by: Ralph Kondziella &lt;rk@argos-messtechnik.de&gt;
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
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<pre>
Original patch from Ralph Kondziella
plus clean up by Wolfgang Denk
plus changes by John Rigby
    use ips clock not lpc
    port forward to current u-boot release

Signed-off-by: Ralph Kondziella &lt;rk@argos-messtechnik.de&gt;
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>ADS5121 Add IC Ident Module (IIM) support</title>
<updated>2009-02-03T22:40:20+00:00</updated>
<author>
<name>Martha Marx</name>
<email>mmarx@silicontkx.com</email>
</author>
<published>2009-01-26T17:45:07+00:00</published>
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<content type='text'>
IIM (IC Identification Module) is the fusebox for the mpc5121.
Use #define CONFIG_IIM to turn on the clock for this module
use #define CONFIG_CMD_FUSE to add fusebox commands.
Fusebox commands include the ability to read
the status, read the register cache, override the register cache,
program the fuses and sense them.

Signed-off-by: Martha Marx &lt;mmarx@silicontkx.com&gt;
Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
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<pre>
IIM (IC Identification Module) is the fusebox for the mpc5121.
Use #define CONFIG_IIM to turn on the clock for this module
use #define CONFIG_CMD_FUSE to add fusebox commands.
Fusebox commands include the ability to read
the status, read the register cache, override the register cache,
program the fuses and sense them.

Signed-off-by: Martha Marx &lt;mmarx@silicontkx.com&gt;
Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rename CFG_ macros to CONFIG_SYS</title>
<updated>2008-10-18T19:54:03+00:00</updated>
<author>
<name>Jean-Christophe PLAGNIOL-VILLARD</name>
<email>plagnioj@jcrosoft.com</email>
</author>
<published>2008-10-16T13:01:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6d0f6bcf337c5261c08fabe12982178c2c489d76'/>
<id>6d0f6bcf337c5261c08fabe12982178c2c489d76</id>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
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<pre>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>ADS5121: Fix NOR and CPLD ALE timing for rev 2 silicon</title>
<updated>2008-08-28T19:36:43+00:00</updated>
<author>
<name>John Rigby</name>
<email>jrigby@freescale.com</email>
</author>
<published>2008-08-28T19:17:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8a490422bed685c9491274ec997f62061d88620b'/>
<id>8a490422bed685c9491274ec997f62061d88620b</id>
<content type='text'>
MPC5121 rev 2 silicon has a new register for controlling how long
CS is asserted after deassertion of ALE in multiplexed mode.

The default is to assert CS together with ALE.  The alternative
is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.

The default is wrong for the NOR flash and CPLD on the ADS5121.

This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
it does so conditionally based on silicon rev 2.0 or greater.

Signed-off-by: Martha J Marx &lt;mmarx@silicontkx.com&gt;
Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
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<pre>
MPC5121 rev 2 silicon has a new register for controlling how long
CS is asserted after deassertion of ALE in multiplexed mode.

The default is to assert CS together with ALE.  The alternative
is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.

The default is wrong for the NOR flash and CPLD on the ADS5121.

This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
it does so conditionally based on silicon rev 2.0 or greater.

Signed-off-by: Martha J Marx &lt;mmarx@silicontkx.com&gt;
Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc5121: Move iopin features from board specific to common files.</title>
<updated>2008-08-06T02:45:34+00:00</updated>
<author>
<name>Kenneth Johansson</name>
<email>kenneth@southpole.se</email>
</author>
<published>2008-07-15T10:13:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6689484ccd43189322aaa5a1c6cd02cdd511ad7d'/>
<id>6689484ccd43189322aaa5a1c6cd02cdd511ad7d</id>
<content type='text'>
And in the process eliminate some duplicate register defines.

Signed-off-by: Kenneth Johansson &lt;kenneth@southpole.se&gt;
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<pre>
And in the process eliminate some duplicate register defines.

Signed-off-by: Kenneth Johansson &lt;kenneth@southpole.se&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MPC5121e ADS PCI support take 3</title>
<updated>2008-03-02T20:44:59+00:00</updated>
<author>
<name>John Rigby</name>
<email>jrigby@freescale.com</email>
</author>
<published>2008-02-26T16:38:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5f91db7f582ca17b1f19f10189c025696f333d2e'/>
<id>5f91db7f582ca17b1f19f10189c025696f333d2e</id>
<content type='text'>
Adds PCI support for MPC5121

Tested with drivers/net/rtl8139.c

Support is conditional since PCI on old silicon does not work.

ads5121_PCI_config turns on PCI

In this version, condition compilation of PCI code has been moved
from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as
suggested by Jean-Christophe PLAGNIOL-VILLARD

Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
</content>
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<pre>
Adds PCI support for MPC5121

Tested with drivers/net/rtl8139.c

Support is conditional since PCI on old silicon does not work.

ads5121_PCI_config turns on PCI

In this version, condition compilation of PCI code has been moved
from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as
suggested by Jean-Christophe PLAGNIOL-VILLARD

Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Change IPS freq to 66MHz</title>
<updated>2008-02-07T00:08:05+00:00</updated>
<author>
<name>John Rigby</name>
<email>jrigby@freescale.com</email>
</author>
<published>2008-01-30T20:36:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=de55d18df3ff2ea614624e74793de7c43520e0e7'/>
<id>de55d18df3ff2ea614624e74793de7c43520e0e7</id>
<content type='text'>
Recommended frequency is 66MHz
Change divider from 4 to 3.

Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
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<pre>
Recommended frequency is 66MHz
Change divider from 4 to 3.

Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Set ips dividor to 1/4 of csb clock.</title>
<updated>2008-01-17T08:31:58+00:00</updated>
<author>
<name>Grzegorz Bernacki</name>
<email>gjb@semihalf.com</email>
</author>
<published>2008-01-16T14:12:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=334e442e6fac59be91244063e9b3f6ca25e8daf8'/>
<id>334e442e6fac59be91244063e9b3f6ca25e8daf8</id>
<content type='text'>
Previous setting cause ips clock to be out of spec. This bug was found by John
Rigby from Freescale.

Signed-off-by: Grzegorz Bernacki &lt;gjb@semihalf.com&gt;
</content>
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<pre>
Previous setting cause ips clock to be out of spec. This bug was found by John
Rigby from Freescale.

Signed-off-by: Grzegorz Bernacki &lt;gjb@semihalf.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ADS5121: MAX slew rate for PATA pins</title>
<updated>2008-01-13T22:36:22+00:00</updated>
<author>
<name>John Rigby</name>
<email>jrigby@freescale.com</email>
</author>
<published>2007-08-25T00:18:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=51b67d06faa670c65de6f29ec5b5aace74b2a047'/>
<id>51b67d06faa670c65de6f29ec5b5aace74b2a047</id>
<content type='text'>
Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
</content>
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<pre>
Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Coding style cleanup, update CHANGELOG</title>
<updated>2007-08-02T19:27:46+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2007-08-02T19:27:46+00:00</published>
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<id>b1b54e352028ed370c3aa95d6fdeb9d64c5d2f86</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
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<pre>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</pre>
</div>
</content>
</entry>
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