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<title>u-boot.git/include/mpc83xx.h, branch v2009.03</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>83xx: add missing TIMING_CFG1_CASLAT_* defines</title>
<updated>2009-02-17T01:17:19+00:00</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2009-02-11T18:26:15+00:00</published>
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<id>2b68b23373f96199a0cafbfd7a9f79ed62381ebb</id>
<content type='text'>
Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>83xx: Add eSDHC support on 8379 EMDS board</title>
<updated>2009-02-17T00:07:43+00:00</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2008-10-30T21:50:14+00:00</published>
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Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
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<pre>
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>mpc83xx: Add support for MPC83xx PCI-E controllers</title>
<updated>2009-01-22T00:43:49+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2009-01-08T01:26:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fd6646c0b9ebe7e5afc4ae4c78097d9cd317a5e8'/>
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<content type='text'>
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.

The patch is based on Tony Li and Dave Liu work[1].

Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.

To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.

[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html

Signed-off-by: Tony Li &lt;tony.li@freescale.com&gt;
Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Acked-by: Dave Liu &lt;daveliu@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.

The patch is based on Tony Li and Dave Liu work[1].

Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.

To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.

[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html

Signed-off-by: Tony Li &lt;tony.li@freescale.com&gt;
Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Acked-by: Dave Liu &lt;daveliu@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>83xx: PCI agent mode fixes for multi-board systems</title>
<updated>2009-01-22T00:43:49+00:00</updated>
<author>
<name>Ira Snyder</name>
<email>iws@ovro.caltech.edu</email>
</author>
<published>2009-01-12T21:32:26+00:00</published>
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<content type='text'>
When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
the boards will lock up the PCI bus by scanning against each other.

The boards lock against each other by trying to access the PCI bus before
clearing their configuration lock bit. Both boards end up in a loop,
sending and receiving "Target Not Ready" messages forever.

When running in PCI agent mode, the scanning now takes place after the
boards have cleared their configuration lock bit.

Also, add a missing declaration to the mpc83xx.h header file, fixing a
build warning.

Signed-off-by: Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
the boards will lock up the PCI bus by scanning against each other.

The boards lock against each other by trying to access the PCI bus before
clearing their configuration lock bit. Both boards end up in a loop,
sending and receiving "Target Not Ready" messages forever.

When running in PCI agent mode, the scanning now takes place after the
boards have cleared their configuration lock bit.

Also, add a missing declaration to the mpc83xx.h header file, fixing a
build warning.

Signed-off-by: Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: 83xx: add missing TIMING_CFG1_CASLAT_* defines</title>
<updated>2008-11-20T00:43:09+00:00</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2008-11-19T09:10:30+00:00</published>
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<id>facdad5f2602e899a01746916beddbf9e856b5ee</id>
<content type='text'>
Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
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<pre>
Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Make Freescale local bus registers available for both 83xx and 85xx.</title>
<updated>2008-10-29T16:12:53+00:00</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2008-10-29T15:05:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4e190b03aaf2309bd2e025d1187a2ca880fedc95'/>
<id>4e190b03aaf2309bd2e025d1187a2ca880fedc95</id>
<content type='text'>
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin &lt;Jason.Jin@freescale.com&gt;
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin &lt;Jason.Jin@freescale.com&gt;
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc83xx: add TSECs' HRCWH masks for MPC837x processors</title>
<updated>2008-10-21T23:34:05+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2008-10-02T14:31:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e6d9c8916de9c24f2c52d0b01cf00d2e74a04cd8'/>
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<content type='text'>
We'll use these masks to parse TSEC modes out of HRCWH.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
We'll use these masks to parse TSEC modes out of HRCWH.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mpc83xx: Fix typo in include/mpc83xx.h</title>
<updated>2008-09-24T14:58:34+00:00</updated>
<author>
<name>Nobuhiro Iwamatsu</name>
<email>iwamatsu.nobuhiro@renesas.com</email>
</author>
<published>2008-09-24T01:42:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2fb29c520c42b7bfef33ea3fd1527eba64099164'/>
<id>2fb29c520c42b7bfef33ea3fd1527eba64099164</id>
<content type='text'>
Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X

Signed-off-by: Nobuhiro Iwamatsu &lt;iwamatsu.nobuhiro@renesas.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X

Signed-off-by: Nobuhiro Iwamatsu &lt;iwamatsu.nobuhiro@renesas.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MPC83XX: Add miscellaneous registers and #defines to support MPC83xx family devices</title>
<updated>2008-08-25T22:04:40+00:00</updated>
<author>
<name>Nick Spence</name>
<email>nick.spence@freescale.com</email>
</author>
<published>2008-08-23T06:52:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=002d27caf26e7eb913d474d3a91f67d56c8c31d5'/>
<id>002d27caf26e7eb913d474d3a91f67d56c8c31d5</id>
<content type='text'>
This patch adds elements to the 83xx sysconf structure and #define values that are used
by mpc83xx family devices.

Signed-off-by: Nick Spence &lt;nick.spence@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
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<pre>
This patch adds elements to the 83xx sysconf structure and #define values that are used
by mpc83xx family devices.

Signed-off-by: Nick Spence &lt;nick.spence@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>NAND boot: MPC8313ERDB support</title>
<updated>2008-08-12T16:31:31+00:00</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2008-06-30T19:13:28+00:00</published>
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<content type='text'>
Note that with older board revisions, NAND boot may only work after a
power-on reset, and not after a warm reset.  I don't have a newer board
to test on; if you have a board with a 33MHz crystal, please let me know
if it works after a warm reset.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
Note that with older board revisions, NAND boot may only work after a
power-on reset, and not after a warm reset.  I don't have a newer board
to test on; if you have a board with a 33MHz crystal, please let me know
if it works after a warm reset.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
</div>
</content>
</entry>
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