u-boot.git/include/mpc83xx.h, branch v2010.09 Unnamed repository; edit this file 'description' to name the repository. mpc8308: support for Freescale MPC8308 cpu 2010-07-09T20:00:54+00:00 Ilya Yanok yanok@emcraft.com 2010-06-28T12:44:33+00:00 7c619ddceebc6bf85ee05c705f02691f581bc282 This patch adds basic support for Freescale MPC8308 CPU. Serial ports, NOR flash and integrated Ethernet controllers are supported. PCI Express is also supported. eSDHC, NAND and USB may work but aren't tested (using ULPI PHY requires additional patch). Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also supported. eSDHC, NAND and USB may work but aren't
tested (using ULPI PHY requires additional patch).

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Update SICRL_USBDR to reflect 4 different settings 2010-06-04T15:42:59+00:00 Ron Madrid ron_madrid@sbcglobal.net 2010-06-02T00:00:49+00:00 f986325dd569faeaec4186f678d113505c5c4828 This patch changed the SICRL_USBDR define to reflect the 4 different bit settings for this two-bit field. The four different options are '00', '01', '10', and '11'. This patch also corrects the config file for SIMPC8313 and MPC8313ERDB for the appropriate fields. This change only affects the MPC8313 cpu. Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
This patch changed the SICRL_USBDR define to reflect the 4 different bit
settings for this two-bit field.  The four different options are '00', '01',
'10', and '11'.  This patch also corrects the config file for SIMPC8313 and
MPC8313ERDB for the appropriate fields.  This change only affects the MPC8313
cpu.

Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
mpc83xx: add missing CSCONFIG_ODT_WR_CFG for 832x CPUs 2009-08-21T22:10:35+00:00 Heiko Schocher hs@denx.de 2009-08-21T21:30:30+00:00 6d2c26ac831f033b0025cfb256365a047f8dd115 Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
83xx: Add support for fsl_dma driver 2009-07-02T16:15:57+00:00 Peter Tyser ptyser@xes-inc.com 2009-06-30T22:15:51+00:00 e94e460c6e8741f42dab6d8dd4b596ba5d9d79ae Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu> Tested-by: Ira W. Snyder <iws@ovro.caltech.edu> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu>
Tested-by: Ira W. Snyder <iws@ovro.caltech.edu>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x 2009-06-12T18:47:17+00:00 Peter Tyser ptyser@xes-inc.com 2009-05-22T22:23:25+00:00 2c7920afaf96d9779304202cd8a355b4f7576a83 Use the standard lowercase "x" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
83xx: add missing TIMING_CFG1_CASLAT_* defines 2009-02-17T01:17:19+00:00 Heiko Schocher hs@denx.de 2009-02-11T18:26:15+00:00 2b68b23373f96199a0cafbfd7a9f79ed62381ebb Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
83xx: Add eSDHC support on 8379 EMDS board 2009-02-17T00:07:43+00:00 Andy Fleming afleming@freescale.com 2008-10-30T21:50:14+00:00 e1ac387f4645499746856adc1aeaa9787da2eca6 Signed-off-by: Andy Fleming <afleming@freescale.com> 
Signed-off-by: Andy Fleming <afleming@freescale.com>
mpc83xx: Add support for MPC83xx PCI-E controllers 2009-01-22T00:43:49+00:00 Anton Vorontsov avorontsov@ru.mvista.com 2009-01-08T01:26:12+00:00 fd6646c0b9ebe7e5afc4ae4c78097d9cd317a5e8 This patch adds support for MPC83xx PCI-E controllers in Root Complex mode. The patch is based on Tony Li and Dave Liu work[1]. Though unlike the original patch, by default we don't register PCI-E buses for use in U-Boot, we only configure the controllers for future use in other OSes (Linux). This is done because we don't have enough of spare BATs to map all the PCI-E regions. To actually use PCI-E in U-Boot, users should explicitly define CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And only then U-Boot will able to access PCI-E, but at the cost of disabled address translation. [1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html Signed-off-by: Tony Li <tony.li@freescale.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.

The patch is based on Tony Li and Dave Liu work[1].

Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.

To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.

[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html

Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
83xx: PCI agent mode fixes for multi-board systems 2009-01-22T00:43:49+00:00 Ira Snyder iws@ovro.caltech.edu 2009-01-12T21:32:26+00:00 75f35209f702bb26826855ed8c8e4d108ab5f412 When running a system with 2 or more MPC8349EMDS boards in PCI agent mode, the boards will lock up the PCI bus by scanning against each other. The boards lock against each other by trying to access the PCI bus before clearing their configuration lock bit. Both boards end up in a loop, sending and receiving "Target Not Ready" messages forever. When running in PCI agent mode, the scanning now takes place after the boards have cleared their configuration lock bit. Also, add a missing declaration to the mpc83xx.h header file, fixing a build warning. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
the boards will lock up the PCI bus by scanning against each other.

The boards lock against each other by trying to access the PCI bus before
clearing their configuration lock bit. Both boards end up in a loop,
sending and receiving "Target Not Ready" messages forever.

When running in PCI agent mode, the scanning now takes place after the
boards have cleared their configuration lock bit.

Also, add a missing declaration to the mpc83xx.h header file, fixing a
build warning.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
powerpc: 83xx: add missing TIMING_CFG1_CASLAT_* defines 2008-11-20T00:43:09+00:00 Heiko Schocher hs@denx.de 2008-11-19T09:10:30+00:00 facdad5f2602e899a01746916beddbf9e856b5ee Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>