u-boot.git/include/mpc83xx.h, branch v2011.09 Unnamed repository; edit this file 'description' to name the repository. MPC83xx: add define for global half-strength enable (HSE) 2011-07-07T00:09:27+00:00 Andre Schwarz andre.schwarz@matrix-vision.de 2011-04-14T12:53:37+00:00 a7b8126ecdda0319901eef3aa1d064f427c866fa Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
mpc83xx: Use correct register to calculate clocks. 2011-02-05T23:06:57+00:00 Joakim Tjernlund Joakim.Tjernlund@transmode.se 2011-01-27T15:30:54+00:00 26e5f794d3169080d89b57e64981a56e6a551da8 Use SPMR instead of HRCWL when calculating clocks as HCRWL may be changed and the CPU will not pick up all changes until there is a POR. u-boot will think SPMF has changed and get the clocks wrong. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
Use SPMR instead of HRCWL when calculating clocks as HCRWL
may be changed and the CPU will not pick up all changes
until there is a POR. u-boot will think SPMF has changed and get
the clocks wrong.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
83xx: Remove warmboot parameter from PCI init functions 2010-09-23T19:14:42+00:00 Peter Tyser ptyser@xes-inc.com 2010-09-15T00:13:50+00:00 6aa3d3bfaa986f1aff5e21a9b9f68d087715b1a9 This change lays the groundwork for the BOOTFLAG_* flags being removed. This change has the small affect of delaying 100ms on PCI initialization after a warm boot as opposed to the optimal 1ms on some boards. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> included the mpc8308_p1m board. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
This change lays the groundwork for the BOOTFLAG_* flags being removed.

This change has the small affect of delaying 100ms on PCI initialization
after a warm boot as opposed to the optimal 1ms on some boards.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

included the mpc8308_p1m board.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
mpc8308: add SICR{L,H} fields definitions 2010-09-23T19:14:02+00:00 Ilya Yanok yanok@emcraft.com 2010-09-17T21:41:48+00:00 f3ce250d96588d96bd4148883455e00ea14adca5 This patch adds defines to set supported fields in System I/O Configuration Registers High and Low on Freescale MPC8308 CPU. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
This patch adds defines to set supported fields in System I/O
Configuration Registers High and Low on Freescale MPC8308 CPU.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
mpc8308: support for Freescale MPC8308 cpu 2010-07-09T20:00:54+00:00 Ilya Yanok yanok@emcraft.com 2010-06-28T12:44:33+00:00 7c619ddceebc6bf85ee05c705f02691f581bc282 This patch adds basic support for Freescale MPC8308 CPU. Serial ports, NOR flash and integrated Ethernet controllers are supported. PCI Express is also supported. eSDHC, NAND and USB may work but aren't tested (using ULPI PHY requires additional patch). Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also supported. eSDHC, NAND and USB may work but aren't
tested (using ULPI PHY requires additional patch).

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Update SICRL_USBDR to reflect 4 different settings 2010-06-04T15:42:59+00:00 Ron Madrid ron_madrid@sbcglobal.net 2010-06-02T00:00:49+00:00 f986325dd569faeaec4186f678d113505c5c4828 This patch changed the SICRL_USBDR define to reflect the 4 different bit settings for this two-bit field. The four different options are '00', '01', '10', and '11'. This patch also corrects the config file for SIMPC8313 and MPC8313ERDB for the appropriate fields. This change only affects the MPC8313 cpu. Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
This patch changed the SICRL_USBDR define to reflect the 4 different bit
settings for this two-bit field.  The four different options are '00', '01',
'10', and '11'.  This patch also corrects the config file for SIMPC8313 and
MPC8313ERDB for the appropriate fields.  This change only affects the MPC8313
cpu.

Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
mpc83xx: add missing CSCONFIG_ODT_WR_CFG for 832x CPUs 2009-08-21T22:10:35+00:00 Heiko Schocher hs@denx.de 2009-08-21T21:30:30+00:00 6d2c26ac831f033b0025cfb256365a047f8dd115 Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
83xx: Add support for fsl_dma driver 2009-07-02T16:15:57+00:00 Peter Tyser ptyser@xes-inc.com 2009-06-30T22:15:51+00:00 e94e460c6e8741f42dab6d8dd4b596ba5d9d79ae Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu> Tested-by: Ira W. Snyder <iws@ovro.caltech.edu> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu>
Tested-by: Ira W. Snyder <iws@ovro.caltech.edu>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x 2009-06-12T18:47:17+00:00 Peter Tyser ptyser@xes-inc.com 2009-05-22T22:23:25+00:00 2c7920afaf96d9779304202cd8a355b4f7576a83 Use the standard lowercase "x" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
83xx: add missing TIMING_CFG1_CASLAT_* defines 2009-02-17T01:17:19+00:00 Heiko Schocher hs@denx.de 2009-02-11T18:26:15+00:00 2b68b23373f96199a0cafbfd7a9f79ed62381ebb Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> 
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>