u-boot.git/include/mtd, branch v2014.07-rc3

mtd: move & update nand_ecclayout structure (plus board changes)

2013-11-21T19:32:43+00:00

nand_ecclayout is present in mtd.h at Linux.
Move this structure to mtd.h to comply with Linux.

Also, increase the ecc placement locations to 640 to suport device having
writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone
up to 640 bytes and consequently the maximum ecc placement locations have
also gone up to 640.

Changes from Prabhabkar's version (squashed into one patch to preserve
bisectability):
 - Added _LARGE to MTD_MAX_*_ENTRIES

   This makes the names match current Linux source, and resolves
   a conflict between
   http://patchwork.ozlabs.org/patch/280488/
   and
   http://patchwork.ozlabs.org/patch/284513/

   The former was posted first and is closer to matching Linux, but
   unlike Linux it does not add _LARGE to the names.  The second adds
   _LARGE to one of the names, and depends on it in a subsequent patch
   (http://patchwork.ozlabs.org/patch/284512/).

 - Made max oobfree/eccpos configurable, and used this on tricorder,
   alpr, ASH405, T4160QDS, and T4240QDS (these boards failed to build
   for me without doing so, due to a size increase).

   On tricorder SPL, this saves 2576 bytes (and makes the SPL build
   again) versus the new default of 640 eccpos and 32 oobfree, and
   saves 336 bytes versus the old default of 128 eccpos and 8 oobfree.

Signed-off-by: Prabhakar Kushwaha 
CC: Vipin Kumar 
[scottwood@freescale.com: changes as described above]
Signed-off-by: Scott Wood 
Cc: Thomas Weber 
Cc: Matthias Fuchs 
Cc: Stefan Roese 
Cc: York Sun 
Cc: Tom Rini 
Reviewed-by: Stefan Roese

cfi_flash: Add prototypes of overridable functions

2013-07-30T07:11:54+00:00

This commit adds some prototypes into include/mtd/cfi_flash.h.
These functions are defined with a weak attribute in
drivers/mtd/cfi_flash.c.
This means they can be overrided by board-specific ones
if necessary.

When defining such functions under board/ directory or
somewhere, cfi_flash.h should be included.
This makes sure that board-specfic cfi functions
are defined in a correct prototype.

Signed-off-by: Masahiro Yamada 
Signed-off-by: Stefan Roese

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24T13:44:38+00:00

Signed-off-by: Wolfgang Denk 
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini

Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

2013-05-31T22:28:47+00:00

mtd: resync with Linux-3.7.1

2013-05-31T22:12:03+00:00

This patch is essentially an update of u-boot MTD subsystem to
the state of Linux-3.7.1 with exclusion of some bits:

- the update is concentrated on NAND, no onenand or CFI/NOR/SPI
flashes interfaces are updated EXCEPT for API changes.

- new large NAND chips support is there, though some updates
have got in Linux-3.8.-rc1, (which will follow on top of this patch).

To produce this update I used tag v3.7.1 of linux-stable repository.

The update was made using application of relevant patches,
with changes relevant to U-Boot-only stuff sticked together
to keep bisectability. Then all changes were grouped together
to this patch.

Signed-off-by: Sergey Lapin 
[scottwood@freescale.com: some eccstrength and build fixes]
Signed-off-by: Scott Wood

cfi_flash: Fix unaligned accesses to cfi_qry structure

2013-05-23T07:47:59+00:00

Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-munaligned-access option: flash initialization hangs, probably
due to data error.

Since the structure is supposed to replicate the actual data layout
in CFI Flash chips, the alignment issue can't be fixed in the structure.
So, unaligned fields need using of explicit unaligned access macros.

Signed-off-by: Andrew Gabbasov 
Reviewed-By: Albert ARIBAUD 
Signed-off-by: Stefan Roese

Revert "mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support"

2013-04-12T17:04:54+00:00

This reverts commit 239cb9d904cfa8ab50d840a47b3306189d695c75.

Signed-off-by: Stefan Roese

mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support

2013-04-02T12:27:45+00:00

This commit is based on that patch from aaron.williams@caviumnetworks.com
with same commit title. pulled the same code changes into current u-boot tree.

http://patchwork.ozlabs.org/patch/140863/
http://lists.denx.de/pipermail/u-boot/2011-April/089606.html

This patch corrects the addresses used when working with Spansion/AMD FLASH chips.
Addressing for 8 and 16 bits is almost identical except in the 16-bit case the
LSB of the address is always 0.  The confusion arose because the addresses
in the datasheet for 16-bit mode are word addresses but this code assumed it was
byte addresses.

I have only been able to test this on our Octeon boards which use either an 8-bit
or 16-bit bus.  I have not tested the case where there's an 8-bit part on a 16-bit
bus.

This patch also adds some delays as suggested by Spansion.

If a part can be both 8 and 16-bits, it forces it to work in 8-bit mode if an
8-bit bus is detected.

Apart from the pulled changes, fixed few minor code cleanups and tested
on 256M29EW, 512M29EW flashes.

Before this fix:
---------------
Bank # 1: CFI conformant flash (8 x 8)  Size: 64 MB in 512 Sectors
  AMD Standard command set, Manufacturer ID: 0xFF, Device ID: 0xFF
  Erase timeout: 4096 ms, write timeout: 2 ms
  Buffer write timeout: 5 ms, buffer size: 1024 bytes

After this fix:
--------------
Bank # 1: CFI conformant flash (8 x 8)  Size: 64 MB in 512 Sectors
  AMD Standard command set, Manufacturer ID: 0x89, Device ID: 0x7E2301
  Erase timeout: 4096 ms, write timeout: 2 ms
  Buffer write timeout: 5 ms, buffer size: 1024 bytes

Signed-off-by: Aaron Williams 
Signed-off-by: Jagannadha Sutradharudu Teki 
Tested-by: Jagannadha Sutradharudu Teki

cfi_flash: add support for Spansion flash PPB sector protection

2012-08-13T12:34:35+00:00

Erasing flash sectors protected with persistent protection bit (PPB)
mechanism on Spansion flash chips doesn't work. Add sector protection
status checking and sector lock and unlock commands to fix this.

Signed-off-by: Anatolij Gustschin 
Cc: Stefan Roese 
Signed-off-by: Stefan Roese

cfi_flash: Add optional config register write to cfi-detection

2010-12-17T08:56:05+00:00

This patch adds the possibility to (optinally) write to the
flash configuration register. The Intel style CFI chips support
such a register that can be used to configure the operation
mode to a non-default value.

This method will be used by the t3corp board, which needs to
configure the DS617 Xilinx flash for async read mode.

Signed-off-by: Stefan Roese