u-boot.git/include/netdev.h, branch v2014.01-rc1 Unnamed repository; edit this file 'description' to name the repository. Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24T13:44:38+00:00 Wolfgang Denk wd@denx.de 2013-07-08T07:37:19+00:00 1a4596601fd395f3afb8f82f3f840c5e00bdd57a Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
net: add Faraday FTMAC110 10/100Mbps ethernet support 2013-06-25T00:11:16+00:00 Kuo-Jung Su dantesu@faraday-tech.com 2013-05-07T06:33:31+00:00 c4775476d211a4be027e45c14ef961de7312d5f6 Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux. However it has a weird DMA alignment issue: (1) Tx DMA Buffer Address: 1 bytes aligned: Invalid 2 bytes aligned: O.K 4 bytes aligned: O.K (2) Rx DMA Buffer Address: 1 bytes aligned: Invalid 2 bytes aligned: O.K 4 bytes aligned: Invalid!!! Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com> 
Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux.
However it has a weird DMA alignment issue:

(1) Tx DMA Buffer Address:
    1 bytes aligned: Invalid
    2 bytes aligned: O.K
    4 bytes aligned: O.K

(2) Rx DMA Buffer Address:
    1 bytes aligned: Invalid
    2 bytes aligned: O.K
    4 bytes aligned: Invalid!!!

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Tom Rini <trini@ti.com>
net: ks8851_mll: add ethernet support 2013-06-25T00:11:14+00:00 Roberto Cerati roberto.cerati@bticino.it 2013-04-24T02:46:17+00:00 45a1693a312453dcb5d26cd03c57569c50872cc6 The device interface is 16 bits wide. All the available packets are read from the incoming fifo. Signed-off-by: Roberto Cerati <roberto.cerati@bticino.it> Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> [voice.shen@atmel.com: address comments from review results] [voice.shen@atmel.com: clean up for submit] Signed-off-by: Bo Shen <voice.shen@atmel.com> Tested-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> 
The device interface is 16 bits wide.
All the available packets are read from the incoming fifo.

Signed-off-by: Roberto Cerati <roberto.cerati@bticino.it>
Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
[voice.shen@atmel.com: address comments from review results]
[voice.shen@atmel.com: clean up for submit]
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
net: Add sunxi (Allwinner) wemac driver 2013-06-25T00:07:31+00:00 Henrik Nordström henrik@henriknordstrom.net 2012-11-25T11:41:36+00:00 518ce472f7b89284454cf5a7107837e995a5caf9 This patch adds support for the WEMAC, the ethernet controller included in the Allwinner A10 SoC. It will get used in the upcoming A10 board support. From: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> 
This patch adds support for the WEMAC, the ethernet controller included
in the Allwinner A10 SoC. It will get used in the upcoming A10 board
support.

From: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Merge branch 'u-boot/master' into 'u-boot-arm/master' 2013-05-30T12:45:06+00:00 Albert ARIBAUD albert.u.boot@aribaud.net 2013-05-30T12:45:06+00:00 a19b0dd62d7b8efc658fa1aa685ff5665878f3ee Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c 
Conflicts:
	common/cmd_fpga.c
	drivers/usb/host/ohci-at91.c
Power: remove support for Freescale MPC8220 2013-05-15T12:41:03+00:00 Wolfgang Denk wd@denx.de 2013-05-11T03:00:50+00:00 d6ed3222229974682799bd2083f2ceeac6f912b1 The Freescale MPC8220 Power Architecture processors have long reached EOL; Freescale does not even list these any more on their web site. Remove the code to avoid wasting maitaining efforts on dead stuff. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andy Fleming <afleming@gmail.com> 
The Freescale MPC8220 Power Architecture processors have long reached
EOL; Freescale does not even list these any more on their web site.

Remove the code to avoid wasting maitaining efforts on dead stuff.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
net: gem: Preserve clk on emio interface 2013-04-30T09:39:24+00:00 David Andrey david.andrey@netmodule.com 2013-04-05T15:24:24+00:00 01fbf31042e1eba1fcca3e84f70db7de0d176fe4 Avoid overwriting GEMx_RCLK_CTRL and GEMx_CLK_CTRL if the Ethernet interface is connect on EMIO Do not enable emio for this standard board configuration for now. Signed-off-by: David Andrey <david.andrey@netmodule.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com> 
Avoid overwriting GEMx_RCLK_CTRL and GEMx_CLK_CTRL
if the Ethernet interface is connect on EMIO

Do not enable emio for this standard board configuration for now.

Signed-off-by: David Andrey <david.andrey@netmodule.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
net: gem: Pass phy address to init 2013-04-30T09:39:23+00:00 David Andrey david.andrey@netmodule.com 2013-04-04T17:13:07+00:00 117cd4cc103443b442afc4d48c8d3920f6c171c0 Pass the PHY address to the driver init to allow parallel use of both interfaces Signed-off-by: David Andrey <david.andrey@netmodule.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com> 
Pass the PHY address to the driver init to
allow parallel use of both interfaces

Signed-off-by: David Andrey <david.andrey@netmodule.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
net: fec_mxc: get phydev before fec_probe 2013-01-28T05:57:51+00:00 Troy Kisky troy.kisky@boundarydevices.com 2012-10-22T16:40:46+00:00 fe428b909b83f0ef83d1fbc7a446bfb60bc4fe01 Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> 
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
mv88e61xx: refactor PHY and SWITCH level-code 2013-01-08T22:42:10+00:00 Albert ARIBAUD albert.u.boot@aribaud.net 2012-11-26T11:27:35+00:00 0a16ea593355d1a0fd415286089961f9c9ad1614 Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> 
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>