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<title>u-boot.git/include/pci_ids.h, branch v2014.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>malta: support for coreFPGA6 boards</title>
<updated>2013-11-09T16:21:01+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2013-11-08T11:18:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=baf37f06c5cc51d2b9d71a2c83d5d92de60203a9'/>
<id>baf37f06c5cc51d2b9d71a2c83d5d92de60203a9</id>
<content type='text'>
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta with either.

Due to the PCI I/O base differing between Maltas using gt64120 &amp; msc01
system controllers, the UART setup is modified slightly. A second UART
is added so that there is one pointing at the correct address for each
system controller. The Malta board then defines its own
default_serial_console function to select the correct one at runtime.
The incorrect UART will simply not function.

Tested on:
  - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
    with and without an L2 cache.
  - QEMU.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta with either.

Due to the PCI I/O base differing between Maltas using gt64120 &amp; msc01
system controllers, the UART setup is modified slightly. A second UART
is added so that there is one pointing at the correct address for each
system controller. The Malta board then defines its own
default_serial_console function to select the correct one at runtime.
The incorrect UART will simply not function.

Tested on:
  - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
    with and without an L2 cache.
  - QEMU.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: update pci_ids.h with a few new entries</title>
<updated>2012-09-02T12:18:52+00:00</updated>
<author>
<name>Andrew Sharp</name>
<email>andywyse6@gmail.com</email>
</author>
<published>2012-08-29T14:16:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=98c397a6ed3fe58f336f6717831faa99333d72a7'/>
<id>98c397a6ed3fe58f336f6717831faa99333d72a7</id>
<content type='text'>
Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that
are somewhat relevant to u-boot.

Signed-off-by: Andrew Sharp &lt;andywyse6@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that
are somewhat relevant to u-boot.

Signed-off-by: Andrew Sharp &lt;andywyse6@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Update pci_ids.h from current Linux sources</title>
<updated>2011-12-09T16:28:29+00:00</updated>
<author>
<name>Gabe Black</name>
<email>gabeblack@chromium.org</email>
</author>
<published>2011-11-07T23:43:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=71bdf829a0952b76710f945375a72181d61fd4c2'/>
<id>71bdf829a0952b76710f945375a72181d61fd4c2</id>
<content type='text'>
This change copies over the pci_ids.h file from Linux verbatim, plus a few
ids that had been added by hand. The last non-merge change hash in that
file in the kernel repository was:

8930c8aa740b12ad69f44a35137bcc39bfa3dc41

and the kernel was at version 2.6.38.

Signed-off-by: Gabe Black &lt;gabeblack@chromium.org&gt;
Acked-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
[agust@denx.de: updated to preserve used PCI IDs]
Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change copies over the pci_ids.h file from Linux verbatim, plus a few
ids that had been added by hand. The last non-merge change hash in that
file in the kernel repository was:

8930c8aa740b12ad69f44a35137bcc39bfa3dc41

and the kernel was at version 2.6.38.

Signed-off-by: Gabe Black &lt;gabeblack@chromium.org&gt;
Acked-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
[agust@denx.de: updated to preserve used PCI IDs]
Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: add the support for Silicon Image SATA controller</title>
<updated>2011-10-21T23:03:54+00:00</updated>
<author>
<name>Tang Yuantian</name>
<email>B29983@freescale.com</email>
</author>
<published>2011-10-07T19:26:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=83c484d7ecb62a9dfe8adb0da9a04cfb8bbb478b'/>
<id>83c484d7ecb62a9dfe8adb0da9a04cfb8bbb478b</id>
<content type='text'>
Add the Silicon Image series PCI Express to
Serial ATA controller support, including Sil3132,
Sil3131 and Sil3124.
The SATA controller can be used to load kernel.

The features list:
	- Supports 1-lane 2.5 Gbit/s PCI Express
	- Supports one/two/four independent Serial ATA channels
	- Supports Serial ATA Generation 2 transfer rate of 3.0 Gbit/s
	- Supports LBA28 and LBA48

Signed-off-by: Tang Yuantian &lt;b29983@freescale.com&gt;
Signed-off-by: Aaron Williams &lt;Aaron.Williams@cavium.com&gt;
Tested-by: Lan Chunhe &lt;b25806@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the Silicon Image series PCI Express to
Serial ATA controller support, including Sil3132,
Sil3131 and Sil3124.
The SATA controller can be used to load kernel.

The features list:
	- Supports 1-lane 2.5 Gbit/s PCI Express
	- Supports one/two/four independent Serial ATA channels
	- Supports Serial ATA Generation 2 transfer rate of 3.0 Gbit/s
	- Supports LBA28 and LBA48

Signed-off-by: Tang Yuantian &lt;b29983@freescale.com&gt;
Signed-off-by: Aaron Williams &lt;Aaron.Williams@cavium.com&gt;
Tested-by: Lan Chunhe &lt;b25806@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Net: Add Intel E1000 82574L PCIe card support</title>
<updated>2011-04-11T20:20:13+00:00</updated>
<author>
<name>Roy Zang</name>
<email>tie-fei.zang@freescale.com</email>
</author>
<published>2011-01-21T03:29:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2c2668f97132da44516a3847d365269b41bee9d7'/>
<id>2c2668f97132da44516a3847d365269b41bee9d7</id>
<content type='text'>
Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
and MPC8572 board.
Add the missing contact information for future support.

Signed-off-by: Roy Zang &lt;tie-fei.zang@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
and MPC8572 board.
Add the missing contact information for future support.

Signed-off-by: Roy Zang &lt;tie-fei.zang@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Added PCI_DEVICE_ID_PLX_9030.</title>
<updated>2010-11-28T21:48:45+00:00</updated>
<author>
<name>Horst Kronstorfer</name>
<email>hkronsto@frequentis.com</email>
</author>
<published>2010-05-04T10:37:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bb7fc5744dd696552092cee571041d7df3128dbe'/>
<id>bb7fc5744dd696552092cee571041d7df3128dbe</id>
<content type='text'>
Added PCI device ID for the PLXTech PCI 9030 bridge.

Signed-off-by: Horst Kronstorfer &lt;hkronsto@frequentis.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Added PCI device ID for the PLXTech PCI 9030 bridge.

Signed-off-by: Horst Kronstorfer &lt;hkronsto@frequentis.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>video: sm501: add support for SM501 chips on PCI bus</title>
<updated>2010-06-14T10:29:26+00:00</updated>
<author>
<name>Anatolij Gustschin</name>
<email>agust@denx.de</email>
</author>
<published>2010-05-26T08:38:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e2bee9e3c0f4bd363207ce5e496cef2134f67d28'/>
<id>e2bee9e3c0f4bd363207ce5e496cef2134f67d28</id>
<content type='text'>
Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: e1000: Add support for the Intel 82546GB controller</title>
<updated>2009-12-14T05:52:30+00:00</updated>
<author>
<name>Reinhard Arlt</name>
<email>reinhard.arlt@esd.eu</email>
</author>
<published>2009-12-04T08:52:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2ab4a4d0952b754b1c74f4d2b12b83d600d449c8'/>
<id>2ab4a4d0952b754b1c74f4d2b12b83d600d449c8</id>
<content type='text'>
This chip is equipped for example on the esd PMC-ETH2-GB board. So let's
add it to the list of supported chips to the e1000 driver.

Signed-off-by: Reinhard Arlt &lt;reinhard.arlt@esd.eu&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This chip is equipped for example on the esd PMC-ETH2-GB board. So let's
add it to the list of supported chips to the e1000 driver.

Signed-off-by: Reinhard Arlt &lt;reinhard.arlt@esd.eu&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add Intel E1000 PCIE card support</title>
<updated>2009-08-08T09:26:05+00:00</updated>
<author>
<name>Roy Zang</name>
<email>tie-fei.zang@freescale.com</email>
</author>
<published>2009-07-31T05:34:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aa0707897c49c330b7d6b8d8362e44f60f224732'/>
<id>aa0707897c49c330b7d6b8d8362e44f60f224732</id>
<content type='text'>
Based on Intel PRO/1000 Network Driver 7.3.20-k2
  Add Intel E1000 PCIE card support. The following cards are added:
  INTEL_82571EB_COPPER
  INTEL_82571EB_FIBER,
  INTEL_82571EB_SERDES
  INTEL_82571EB_QUAD_COPPER
  INTEL_82571PT_QUAD_COPPER
  INTEL_82571EB_QUAD_FIBER
  INTEL_82571EB_QUAD_COPPER_LOWPROFILE
  INTEL_82571EB_SERDES_DUAL
  INTEL_82571EB_SERDES_QUAD
  INTEL_82572EI_COPPER
  INTEL_82572EI_FIBER
  INTEL_82572EI_SERDES
  INTEL_82572EI
  INTEL_82573E
  INTEL_82573E_IAMT
  INTEL_82573L
  INTEL_82546GB_QUAD_COPPER_KSP3
  INTEL_80003ES2LAN_COPPER_DPT
  INTEL_80003ES2LAN_SERDES_DPT
  INTEL_80003ES2LAN_COPPER_SPT
  INTEL_80003ES2LAN_SERDES_SPT

 82571EB_COPPER dual ports,
 82572EI single port,
 82572EI_COPPER single port PCIE cards
 and
 82545EM_COPPER,
 82541GI_LF
 pci cards are tested on both  P2020 board
 and MPC8544DS board.

 Signed-off-by: Roy Zang &lt;tie-fei.zang@freescale.com&gt;

Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Based on Intel PRO/1000 Network Driver 7.3.20-k2
  Add Intel E1000 PCIE card support. The following cards are added:
  INTEL_82571EB_COPPER
  INTEL_82571EB_FIBER,
  INTEL_82571EB_SERDES
  INTEL_82571EB_QUAD_COPPER
  INTEL_82571PT_QUAD_COPPER
  INTEL_82571EB_QUAD_FIBER
  INTEL_82571EB_QUAD_COPPER_LOWPROFILE
  INTEL_82571EB_SERDES_DUAL
  INTEL_82571EB_SERDES_QUAD
  INTEL_82572EI_COPPER
  INTEL_82572EI_FIBER
  INTEL_82572EI_SERDES
  INTEL_82572EI
  INTEL_82573E
  INTEL_82573E_IAMT
  INTEL_82573L
  INTEL_82546GB_QUAD_COPPER_KSP3
  INTEL_80003ES2LAN_COPPER_DPT
  INTEL_80003ES2LAN_SERDES_DPT
  INTEL_80003ES2LAN_COPPER_SPT
  INTEL_80003ES2LAN_SERDES_SPT

 82571EB_COPPER dual ports,
 82572EI single port,
 82572EI_COPPER single port PCIE cards
 and
 82545EM_COPPER,
 82541GI_LF
 pci cards are tested on both  P2020 board
 and MPC8544DS board.

 Signed-off-by: Roy Zang &lt;tie-fei.zang@freescale.com&gt;

Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add ESD PCI vendor ID</title>
<updated>2009-07-10T23:02:20+00:00</updated>
<author>
<name>Matthias Fuchs</name>
<email>matthias.fuchs@esd.eu</email>
</author>
<published>2009-07-03T14:06:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=dae4e0148a1146a5610025ae4b445e841410b659'/>
<id>dae4e0148a1146a5610025ae4b445e841410b659</id>
<content type='text'>
Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;
</pre>
</div>
</content>
</entry>
</feed>
