u-boot.git/include/pci_ids.h, branch v2015.01 Unnamed repository; edit this file 'description' to name the repository. x86: Add Intel Topcliff PCH device IDs 2014-12-14T05:32:05+00:00 Bin Meng bmeng.cn@gmail.com 2014-12-12T13:05:26+00:00 936248d92f3afb6ec2447f3eccbf9b425dc14b66 Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
pci: Update pci_ids.h to include some missing IDs 2014-11-25T13:33:59+00:00 Simon Glass sjg@chromium.org 2014-11-15T01:18:21+00:00 e3bf4c759be1bf037818100e15af425d16822c29 This was taken from Linux 3.18 with some additional IDs from Chrome OS Coreboot commit 688ef385. Signed-off-by: Simon Glass <sjg@chromium.org> 
This was taken from Linux 3.18 with some additional IDs from Chrome OS
Coreboot commit 688ef385.

Signed-off-by: Simon Glass <sjg@chromium.org>
e1000: add i211 and unprogrammed i210/i211 support 2014-10-28T11:13:56+00:00 Marcel Ziswiler marcel@ziswiler.com 2014-09-07T22:03:50+00:00 6c499abe05f93d9f53338b9831196efeede5f2e0 This patch adds support for i211 as well as unprogrammed aka tools only i210/i211 chip support. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> 
This patch adds support for i211 as well as unprogrammed aka tools only
i210/i211 chip support.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
e1000: add i210 support 2014-08-21T16:01:28+00:00 Marek Vasut marex@denx.de 2014-08-08T14:41:39+00:00 951860634fdb557bbb58e0f99215391bc0c29779 Add i210 support to the e1000 driver. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com> 
Add i210 support to the e1000 driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
malta: support for coreFPGA6 boards 2013-11-09T16:21:01+00:00 Paul Burton paul.burton@imgtec.com 2013-11-08T11:18:50+00:00 baf37f06c5cc51d2b9d71a2c83d5d92de60203a9 This patch adds support for running on Malta boards using coreFPGA6 core cards, including support for the msc01 system controller used with them. The system controller is detected at runtime allowing one U-boot binary to run on a Malta with either. Due to the PCI I/O base differing between Maltas using gt64120 & msc01 system controllers, the UART setup is modified slightly. A second UART is added so that there is one pointing at the correct address for each system controller. The Malta board then defines its own default_serial_console function to select the correct one at runtime. The incorrect UART will simply not function. Tested on: - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both with and without an L2 cache. - QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com> 
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta with either.

Due to the PCI I/O base differing between Maltas using gt64120 & msc01
system controllers, the UART setup is modified slightly. A second UART
is added so that there is one pointing at the correct address for each
system controller. The Malta board then defines its own
default_serial_console function to select the correct one at runtime.
The incorrect UART will simply not function.

Tested on:
  - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
    with and without an L2 cache.
  - QEMU.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
pci: update pci_ids.h with a few new entries 2012-09-02T12:18:52+00:00 Andrew Sharp andywyse6@gmail.com 2012-08-29T14:16:31+00:00 98c397a6ed3fe58f336f6717831faa99333d72a7 Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that are somewhat relevant to u-boot. Signed-off-by: Andrew Sharp <andywyse6@gmail.com> 
Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that
are somewhat relevant to u-boot.

Signed-off-by: Andrew Sharp <andywyse6@gmail.com>
Update pci_ids.h from current Linux sources 2011-12-09T16:28:29+00:00 Gabe Black gabeblack@chromium.org 2011-11-07T23:43:32+00:00 71bdf829a0952b76710f945375a72181d61fd4c2 This change copies over the pci_ids.h file from Linux verbatim, plus a few ids that had been added by hand. The last non-merge change hash in that file in the kernel repository was: 8930c8aa740b12ad69f44a35137bcc39bfa3dc41 and the kernel was at version 2.6.38. Signed-off-by: Gabe Black <gabeblack@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> [agust@denx.de: updated to preserve used PCI IDs] Signed-off-by: Anatolij Gustschin <agust@denx.de> 
This change copies over the pci_ids.h file from Linux verbatim, plus a few
ids that had been added by hand. The last non-merge change hash in that
file in the kernel repository was:

8930c8aa740b12ad69f44a35137bcc39bfa3dc41

and the kernel was at version 2.6.38.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
[agust@denx.de: updated to preserve used PCI IDs]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
drivers: add the support for Silicon Image SATA controller 2011-10-21T23:03:54+00:00 Tang Yuantian B29983@freescale.com 2011-10-07T19:26:58+00:00 83c484d7ecb62a9dfe8adb0da9a04cfb8bbb478b Add the Silicon Image series PCI Express to Serial ATA controller support, including Sil3132, Sil3131 and Sil3124. The SATA controller can be used to load kernel. The features list: - Supports 1-lane 2.5 Gbit/s PCI Express - Supports one/two/four independent Serial ATA channels - Supports Serial ATA Generation 2 transfer rate of 3.0 Gbit/s - Supports LBA28 and LBA48 Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: Aaron Williams <Aaron.Williams@cavium.com> Tested-by: Lan Chunhe <b25806@freescale.com> 
Add the Silicon Image series PCI Express to
Serial ATA controller support, including Sil3132,
Sil3131 and Sil3124.
The SATA controller can be used to load kernel.

The features list:
	- Supports 1-lane 2.5 Gbit/s PCI Express
	- Supports one/two/four independent Serial ATA channels
	- Supports Serial ATA Generation 2 transfer rate of 3.0 Gbit/s
	- Supports LBA28 and LBA48

Signed-off-by: Tang Yuantian <b29983@freescale.com>
Signed-off-by: Aaron Williams <Aaron.Williams@cavium.com>
Tested-by: Lan Chunhe <b25806@freescale.com>
Net: Add Intel E1000 82574L PCIe card support 2011-04-11T20:20:13+00:00 Roy Zang tie-fei.zang@freescale.com 2011-01-21T03:29:38+00:00 2c2668f97132da44516a3847d365269b41bee9d7 Add Intel E1000 82574L PCIe card support. Test on MPC8544DS and MPC8572 board. Add the missing contact information for future support. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> 
Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
and MPC8572 board.
Add the missing contact information for future support.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Added PCI_DEVICE_ID_PLX_9030. 2010-11-28T21:48:45+00:00 Horst Kronstorfer hkronsto@frequentis.com 2010-05-04T10:37:36+00:00 bb7fc5744dd696552092cee571041d7df3128dbe Added PCI device ID for the PLXTech PCI 9030 bridge. Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com> 
Added PCI device ID for the PLXTech PCI 9030 bridge.

Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com>