u-boot.git/include/pci_ids.h, branch v2015.07 Unnamed repository; edit this file 'description' to name the repository. x86: qemu: Add ATA/SATA support 2015-06-04T08:39:39+00:00 Bin Meng bmeng.cn@gmail.com 2015-05-16T01:33:19+00:00 2aa3a7fb1c24afd4c0e12360acccf3234d8fe019 Enable legacy IDE support on the pc target and AHCI support on the q35 target. Default configuration is to support the pc target. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
Enable legacy IDE support on the pc target and AHCI support on the
q35 target. Default configuration is to support the pc target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
x86: pci: Add PCI IDs for lynxpoint 2015-04-17T01:27:40+00:00 Simon Glass sjg@chromium.org 2015-03-02T19:40:51+00:00 713704f5e425c44b945eeacecc21086644213dce Add some new device IDs used by this haswell-based chipset. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
Add some new device IDs used by this haswell-based chipset.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: pci: Add pci ids for Quark SoC 2015-02-06T19:07:45+00:00 Bin Meng bmeng.cn@gmail.com 2015-02-04T08:26:11+00:00 38fc1cdae0fb7a429222b7b85f8cdaefbd078e21 Add pci ids for Intel Quark SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
Add pci ids for Intel Quark SoC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
x86: pci: Add PCI IDs for Minnowboard Max 2015-02-06T05:16:42+00:00 Simon Glass sjg@chromium.org 2015-01-28T05:13:28+00:00 34236238359253ef5342843a3cca09dcca939262 This board includes a few IDs we have not seen before. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
This board includes a few IDs we have not seen before.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: Add Intel Topcliff PCH device IDs 2014-12-14T05:32:05+00:00 Bin Meng bmeng.cn@gmail.com 2014-12-12T13:05:26+00:00 936248d92f3afb6ec2447f3eccbf9b425dc14b66 Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
pci: Update pci_ids.h to include some missing IDs 2014-11-25T13:33:59+00:00 Simon Glass sjg@chromium.org 2014-11-15T01:18:21+00:00 e3bf4c759be1bf037818100e15af425d16822c29 This was taken from Linux 3.18 with some additional IDs from Chrome OS Coreboot commit 688ef385. Signed-off-by: Simon Glass <sjg@chromium.org> 
This was taken from Linux 3.18 with some additional IDs from Chrome OS
Coreboot commit 688ef385.

Signed-off-by: Simon Glass <sjg@chromium.org>
e1000: add i211 and unprogrammed i210/i211 support 2014-10-28T11:13:56+00:00 Marcel Ziswiler marcel@ziswiler.com 2014-09-07T22:03:50+00:00 6c499abe05f93d9f53338b9831196efeede5f2e0 This patch adds support for i211 as well as unprogrammed aka tools only i210/i211 chip support. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> 
This patch adds support for i211 as well as unprogrammed aka tools only
i210/i211 chip support.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
e1000: add i210 support 2014-08-21T16:01:28+00:00 Marek Vasut marex@denx.de 2014-08-08T14:41:39+00:00 951860634fdb557bbb58e0f99215391bc0c29779 Add i210 support to the e1000 driver. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com> 
Add i210 support to the e1000 driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
malta: support for coreFPGA6 boards 2013-11-09T16:21:01+00:00 Paul Burton paul.burton@imgtec.com 2013-11-08T11:18:50+00:00 baf37f06c5cc51d2b9d71a2c83d5d92de60203a9 This patch adds support for running on Malta boards using coreFPGA6 core cards, including support for the msc01 system controller used with them. The system controller is detected at runtime allowing one U-boot binary to run on a Malta with either. Due to the PCI I/O base differing between Maltas using gt64120 & msc01 system controllers, the UART setup is modified slightly. A second UART is added so that there is one pointing at the correct address for each system controller. The Malta board then defines its own default_serial_console function to select the correct one at runtime. The incorrect UART will simply not function. Tested on: - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both with and without an L2 cache. - QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com> 
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta with either.

Due to the PCI I/O base differing between Maltas using gt64120 & msc01
system controllers, the UART setup is modified slightly. A second UART
is added so that there is one pointing at the correct address for each
system controller. The Malta board then defines its own
default_serial_console function to select the correct one at runtime.
The incorrect UART will simply not function.

Tested on:
  - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
    with and without an L2 cache.
  - QEMU.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
pci: update pci_ids.h with a few new entries 2012-09-02T12:18:52+00:00 Andrew Sharp andywyse6@gmail.com 2012-08-29T14:16:31+00:00 98c397a6ed3fe58f336f6717831faa99333d72a7 Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that are somewhat relevant to u-boot. Signed-off-by: Andrew Sharp <andywyse6@gmail.com> 
Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that
are somewhat relevant to u-boot.

Signed-off-by: Andrew Sharp <andywyse6@gmail.com>