u-boot.git/include/ppc405.h, branch v1.3.0

Merge with /home/stefan/git/u-boot/zeus

2007-08-14T13:00:42+00:00

ppc4xx: Add initial Zeus (PPC405EP) board support

2007-08-14T12:44:41+00:00

Signed-off-by: Stefan Roese

ppc4xx: Fix problem in PLL clock calculation

2007-08-13T07:05:33+00:00

This patch was originall provided by David Mitchell 
and fixes a bug in the PLL clock calculation.

Signed-off-by: Stefan Roese

Coding stylke cleanup; rebuild CHANGELOG

2007-06-22T21:59:00+00:00

ppc4xx: Clean up 440 exceptions handling

2007-06-15T09:19:28+00:00

- Introduced dedicated switches for building 440 and 405 images required
  for 440-specific machine instructions like 'rfmci' etc.

- Exception vectors moved to the proper location (_start moved away from
  the critical exception handler space, which it occupied)

- CriticalInput now serviced (with default handler)

- MachineCheck properly serviced (added a dedicated handler and return
  subroutine)

- Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused,
  unhandled and those not relevant for 4xx were eliminated)

- Eliminated Linux leftovers, removed dead code

Signed-off-by: Grzegorz Bernacki 
Signed-off-by: Rafal Jaworowski 
Signed-off-by: Stefan Roese

ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval board

2007-06-06T09:42:13+00:00

This patch adds NAND booting support for the AMCC Acadia eval board.

Please make sure to configure jumper J7 to position 2-3 when booting
from NOR, and to position 1-2 when booting for NAND.

I also added a board command to configure the I2C bootstrap EEPROM
values. Right now only 267MHz is support for booting either via NOR
or NAND FLASH. Here the usage:

=> bootstrap 267 nor	;to configure the board for 267MHz NOR booting
=> bootstrap 267 nand	;to configure the board for 267MHz NNAND booting

Signed-off-by: Stefan Roese

ppc4xx: Use do { ... } while (0) for CPR & SDR access macros

2007-05-22T10:48:09+00:00

Signed-off-by: Stefan Roese

ppc4xx: Add output for bootrom location to 405EZ ports

2007-04-18T10:05:59+00:00

Now 405EZ ports also show upon bootup from which boot device
they are configured to boot:

U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05)

CPU:   AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz)
       Bootstrap Option E - Boot ROM Location EBC (32 bits)
       16 kB I-Cache 16 kB D-Cache
Board: Acadia - AMCC PPC405EZ Evaluation Board

Signed-off-by: Stefan Roese

[PATCH] Add AMCC PPC405EZ support

2007-03-21T12:38:59+00:00

This patch adds support for the new AMCC 405EZ PPC. It is in
preparation for the AMCC Acadia board support.

Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.

Signed-off-by: Stefan Roese

[PATCH] Add support for the AMCC Katmai (440SPe) eval board

2007-02-20T09:57:08+00:00

Signed-off-by: Stefan Roese