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<title>u-boot.git/include/ppc440.h, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>ppc4xx: Move ppc4xx headers to powerpc include directory</title>
<updated>2010-09-23T07:02:05+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2010-09-09T17:18:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b36df561154bdd0a41bb77e09c5575ca2cf48013'/>
<id>b36df561154bdd0a41bb77e09c5575ca2cf48013</id>
<content type='text'>
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Fix 440EPx bug in reconfigure_pll()</title>
<updated>2010-09-03T09:14:21+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2010-08-26T15:14:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c1ab75c7d4e5d080c630335b78681c50aa3569a5'/>
<id>c1ab75c7d4e5d080c630335b78681c50aa3569a5</id>
<content type='text'>
This patch fixes a bug in reconfigure_pll(), where the detection of
the current bootstrap option is wrong. The ICS bits where incorrectly
shifted. This bug was found on the lwmon5 board, which uses bootstrap
option H (I2C bootstrap EEPROM).

Additionally a bit of code was moved into the if statement, since its
only used after later on. No need to run this code all the time.

Also, a few empty lines are added to make the code better readable.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Rupjyoti Sarmah &lt;rsarmah@amcc.com&gt;
Cc: Victor Gallardo &lt;vgallardo@appliedmicro.com&gt;
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<pre>
This patch fixes a bug in reconfigure_pll(), where the detection of
the current bootstrap option is wrong. The ICS bits where incorrectly
shifted. This bug was found on the lwmon5 board, which uses bootstrap
option H (I2C bootstrap EEPROM).

Additionally a bit of code was moved into the if statement, since its
only used after later on. No need to run this code all the time.

Also, a few empty lines are added to make the code better readable.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Rupjyoti Sarmah &lt;rsarmah@amcc.com&gt;
Cc: Victor Gallardo &lt;vgallardo@appliedmicro.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Enable booting with Option E on 460EX/EXr/GT</title>
<updated>2010-07-01T08:25:56+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2010-05-19T09:13:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fe7cca715c69f66efdc9c64462b0fd0a445331a5'/>
<id>fe7cca715c69f66efdc9c64462b0fd0a445331a5</id>
<content type='text'>
This patch enables booting with option E on the PPC460EX/EXr/GT.
When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0.
The Software Boot Configuration Procedure is needed to engage the
PLL and perform a chip reset.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
This patch enables booting with option E on the PPC460EX/EXr/GT.
When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0.
The Software Boot Configuration Procedure is needed to engage the
PLL and perform a chip reset.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx fix unstable 440EPx bootstrap options</title>
<updated>2010-03-24T13:27:01+00:00</updated>
<author>
<name>Rupjyoti Sarmah</name>
<email>rsarmah@appliedmicro.com</email>
</author>
<published>2010-03-24T11:22:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c550afada5fcad426aa6a219a329feb9eedae8b2'/>
<id>c550afada5fcad426aa6a219a329feb9eedae8b2</id>
<content type='text'>
440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
This results in the PLLOUTB being greater than the CPU clock frequency
resulting unstable 440EPx operation resulting in various software hang
conditions.

This patch reprograms the FWDVA satisfying the requirement of setting FWDVB
to a value greater than 1 while using one of the four deafult bootstrap options.

Signed-off-by: Rupjyoti Sarmah &lt;rsarmah@amcc.com&gt;
Acked-by : Victor Gallardo &lt;vgallardo@appliedmicro.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
This results in the PLLOUTB being greater than the CPU clock frequency
resulting unstable 440EPx operation resulting in various software hang
conditions.

This patch reprograms the FWDVA satisfying the requirement of setting FWDVB
to a value greater than 1 while using one of the four deafult bootstrap options.

Signed-off-by: Rupjyoti Sarmah &lt;rsarmah@amcc.com&gt;
Acked-by : Victor Gallardo &lt;vgallardo@appliedmicro.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Cleanup PPC4xx I2C infrastructure</title>
<updated>2009-11-23T15:27:02+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-11-19T13:03:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=eb5eb2b0f744f0cba405160c5d01335c40f09acf'/>
<id>eb5eb2b0f744f0cba405160c5d01335c40f09acf</id>
<content type='text'>
This patch cleans up the PPC4xx I2C intrastructure:

- Use C struct to describe the I2C registers instead of defines
- Coding style cleanup (braces, whitespace, comments, line length)
- Extract common code from i2c_read() and i2c_write()
- Remove unneeded IIC defines from ppc405.h &amp; ppc440.h

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
This patch cleans up the PPC4xx I2C intrastructure:

- Use C struct to describe the I2C registers instead of defines
- Coding style cleanup (braces, whitespace, comments, line length)
- Extract common code from i2c_read() and i2c_write()
- Remove unneeded IIC defines from ppc405.h &amp; ppc440.h

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Consolidate pci_pre_init() function</title>
<updated>2009-11-19T10:35:30+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-11-12T15:41:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a760b0203155da6fb8b8e9086169bb87d09d76fa'/>
<id>a760b0203155da6fb8b8e9086169bb87d09d76fa</id>
<content type='text'>
This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Add function to check and dynamically change PCI sync clock</title>
<updated>2009-10-23T14:04:36+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-10-19T12:06:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5e47f9535f53fd4cc05f32fb6166870f976fbb4e'/>
<id>5e47f9535f53fd4cc05f32fb6166870f976fbb4e</id>
<content type='text'>
PPC440EP(x)/PPC440GR(x):
In asynchronous PCI mode, the synchronous PCI clock must meet
certain requirements. The following equation describes the
relationship that must be maintained between the asynchronous PCI
clock and synchronous PCI clock. Select an appropriate PCI:PLB
ratio to maintain the relationship:

AsyncPCIClk - 1MHz &lt;= SyncPCIclock &lt;= (2 * AsyncPCIClk) - 1MHz

This patch now adds a function to check and reconfigure the sync
PCI clock to meet this requirement. This is in preparation for
some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this
function to not violate the PCI clocking rules.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
PPC440EP(x)/PPC440GR(x):
In asynchronous PCI mode, the synchronous PCI clock must meet
certain requirements. The following equation describes the
relationship that must be maintained between the asynchronous PCI
clock and synchronous PCI clock. Select an appropriate PCI:PLB
ratio to maintain the relationship:

AsyncPCIClk - 1MHz &lt;= SyncPCIclock &lt;= (2 * AsyncPCIClk) - 1MHz

This patch now adds a function to check and reconfigure the sync
PCI clock to meet this requirement. This is in preparation for
some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this
function to not violate the PCI clocking rules.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: respect 80-chars per line in ppc*.h files</title>
<updated>2009-10-07T07:15:30+00:00</updated>
<author>
<name>Niklaus Giger</name>
<email>niklaus.giger@member.fsf.org</email>
</author>
<published>2009-10-04T18:04:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=dbcc357166bed20df13450e93a501f30b197efd1'/>
<id>dbcc357166bed20df13450e93a501f30b197efd1</id>
<content type='text'>
After running checkstyle.pl on the three previous patches I noted that in
the *.h files there were a lot of long lines. This patch solves this problem.

Signed-off-by: Niklaus Giger &lt;niklaus.giger@member.fsf.org&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
After running checkstyle.pl on the three previous patches I noted that in
the *.h files there were a lot of long lines. This patch solves this problem.

Signed-off-by: Niklaus Giger &lt;niklaus.giger@member.fsf.org&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Cleanup some HW register names</title>
<updated>2009-10-07T07:15:13+00:00</updated>
<author>
<name>Niklaus Giger</name>
<email>niklaus.giger@member.fsf.org</email>
</author>
<published>2009-10-04T18:04:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f80e61dcfe53fa3a5936659883415c9bd1b5a3d9'/>
<id>f80e61dcfe53fa3a5936659883415c9bd1b5a3d9</id>
<content type='text'>
Here you find all the changes in the include directory for new register names
and adapting other ones to the names used by AMCC in their manuals, e.g.
For 440EPx/GRPPC440EPx/GRX, Revision 1.15 – September 22, 2008
For PPC405GP Embedded Processor, Revision 1.02 – March 22, 2006

Signed-off-by: Niklaus Giger &lt;niklaus.giger@member.fsf.org&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
Here you find all the changes in the include directory for new register names
and adapting other ones to the names used by AMCC in their manuals, e.g.
For 440EPx/GRPPC440EPx/GRX, Revision 1.15 – September 22, 2008
For PPC405GP Embedded Processor, Revision 1.02 – March 22, 2006

Signed-off-by: Niklaus Giger &lt;niklaus.giger@member.fsf.org&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Big cleanup of PPC4xx defines</title>
<updated>2009-09-11T08:35:58+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-09-09T14:25:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d1c3b27525b664e8c4db6bb173eed51bfc8220de'/>
<id>d1c3b27525b664e8c4db6bb173eed51bfc8220de</id>
<content type='text'>
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -&gt; PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -&gt; CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -&gt; PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -&gt; CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
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