u-boot.git/include/ppc4xx.h, branch v2009.06

ppc4xx: Move definition for PPC4xx NAND FLASH controller to header

2009-05-23T10:51:39+00:00

This patch moves the definition for the PPC4xx NAND FLASH controller
(NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the
upcoming fix for the ECC byte ordering of the NDFC driver.

Signed-off-by: Stefan Roese 
Acked-by: Scott Wood

ppc4xx: Add routine to retrieve CPU number

2008-10-21T15:34:56+00:00

Provide a weak defined routine to retrieve the CPU number for
reference boards that have multiple CPU's.  Default behavior
is the existing single CPU print output.  Reference boards with
multiple CPU's need to provide a board specific routine.
See board/amcc/arches/arches.c for an example.

Signed-off-by: Adam Graham 
Signed-off-by: Victor Gallardo 
Signed-off-by: Stefan Roese

rename CFG_ macros to CONFIG_SYS

2008-10-18T19:54:03+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routines

2008-09-05T10:04:16+00:00

Signed-off-by: Adam Graham 
Signed-off-by: Stefan Roese

ppc4xx: Cleanup of "ppc4xx: Optimize PLB4 Arbiter..." patch

2008-08-21T09:05:03+00:00

This patch fixes some minor issues introduced with the patch:
ppc4xx: Optimize PLB4 Arbiter... from Prodyut Hazarika:

- Rework memory-queue and PLB arbiter optimization code, that the
  local variable is not needed anymore. This removes one #ifdef.
- Use consistant spacing in ppc4xx.h header (XXX + 0x01 instead
  of XXX+ 0x01). This was not introduced by Prodyut, just a
  copy-paste problem.

Signed-off-by: Stefan Roese

ppc4xx: Optimize PLB4 Arbiter and Memory Queue settings for PPC440SP/SPe,

2008-08-21T08:31:16+00:00

	PPC405EX and PPC460EX/GT/SX

- Read pipeline depth set to 4 for PPC440SP/SPE, PPC405EX, PPC460EX/GT/SX
  processors
- Moved PLB4 Arbiter register definitions to ppc4xx.h since it is shared
  across processors (405 and 440/460)
- Optimize Memory Queue settings for PPC440SP/SPE and PPC460EX/GT/SX
  processors
- Add register bit definitions for Memory Queue Configuration registers

Signed-off-by: Prodyut Hazarika 
Signed-off-by: Stefan Roese

Fix merge problems

2008-08-06T12:05:38+00:00

Signed-off-by: Stefan Roese

ppc4xx: CPU PPC440x5 on Virtex5 FX

2008-07-18T10:30:50+00:00

-This patchs gives support for the embbedded ppc440
 on the Virtex5 FPGAs
-interrupts.c divided in uic.c and interrupts.c
-xilinx_irq.c for xilinx interrupt controller
-Include modifications propossed by  Stefan Roese

Signed-off-by: Ricardo Ribalda Delgado 
Acked-by: Stefan Roese

ppc4xx: Consolidate PPC4xx UIC defines

2008-07-11T11:18:13+00:00

This patch is the first step to consolidate the UIC related defines in the
4xx headers. Move header from asm-ppc/ppc4xx-intvec.h to
asm-ppc/ppc4xx-uic.h as it will hold all UIC related defines in the next
steps.

Signed-off-by: Stefan Roese

ppc4xx: Consolidate PPC4xx EBC defines

2008-07-11T11:18:13+00:00

This patch removes all EBC related defines from the PPC4xx headers
ppc405.h and ppc440.h and introduces a new header

include/asm-ppc/ppc4xx-ebc.h

with all those defines.

Signed-off-by: Stefan Roese