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<title>u-boot.git/include/reset.h, branch v2016.05</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>dm: reset: Allow reset_walk() to return</title>
<updated>2015-07-21T23:39:31+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-07-06T18:54:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1704d083b3a1acfe167dc2e3b687263f05a65087'/>
<id>1704d083b3a1acfe167dc2e3b687263f05a65087</id>
<content type='text'>
Add a new reset_walk_halt() function to cause a reset and then halt on
failure. The reset_walk() function returns an error code.

This is needed for testing since otherwise U-Boot will halt in the middle
of a test.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Add a new reset_walk_halt() function to cause a reset and then halt on
failure. The reset_walk() function returns an error code.

This is needed for testing since otherwise U-Boot will halt in the middle
of a test.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: Add a system reset uclass</title>
<updated>2015-07-21T23:39:29+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-06-23T21:39:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f9917454d55caf3dafa41b27d8d8274716433a4c'/>
<id>f9917454d55caf3dafa41b27d8d8274716433a4c</id>
<content type='text'>
It is common for system reset to be available at multiple levels in modern
hardware. For example, an SoC may provide a reset option, and a board may
provide its own reset for reasons of security or thoroughness. It is useful
to be able to model this hardware without hard-coding the behaviour in the
SoC or board. Also there is a distinction sometimes between resetting just
the CPU (leaving GPIO state alone) and resetting all the PMICs, just cutting
power.

To achieve this, add a simple system reset uclass. It allows multiple devices
to provide reset functionality and provides a way to walk through them,
requesting a particular reset type until is it provided.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It is common for system reset to be available at multiple levels in modern
hardware. For example, an SoC may provide a reset option, and a board may
provide its own reset for reasons of security or thoroughness. It is useful
to be able to model this hardware without hard-coding the behaviour in the
SoC or board. Also there is a distinction sometimes between resetting just
the CPU (leaving GPIO state alone) and resetting all the PMICs, just cutting
power.

To achieve this, add a simple system reset uclass. It allows multiple devices
to provide reset functionality and provides a way to walk through them,
requesting a particular reset type until is it provided.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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