u-boot.git/include/spartan3.h, branch v2016.09 Unnamed repository; edit this file 'description' to name the repository. fpga: xilinx: spartan3: Setup NULL fpga_op without driver 2015-01-21T09:25:02+00:00 Michal Simek michal.simek@xilinx.com 2014-07-16T08:46:35+00:00 a99a06cbbd89d7c116b0ed61325ac359f26ed64e Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: xilinx: Simplify load/dump/info function handling 2014-05-13T07:13:59+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T12:07:57+00:00 14cfc4f3735d9704cb6a630ef302be596d380684 Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: xilinx: Fix the rest of CamelCases 2014-05-13T07:13:49+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T11:58:20+00:00 2df9d5c431fca07c9868a36b48ee771bde6b19e8 No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: xilinx: Avoid CamelCase for in Xilinx_desc 2014-05-13T07:12:53+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T11:49:21+00:00 f8c1be9816a60d1f627954fe202b502917c69863 No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: spartan3: Avoid CamelCase 2014-05-13T07:12:52+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T10:28:42+00:00 2a6e3869f25093cd4032a3cd64ee455afbd668bf No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24T13:44:38+00:00 Wolfgang Denk wd@denx.de 2013-07-08T07:37:19+00:00 1a4596601fd395f3afb8f82f3f840c5e00bdd57a Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
fpga: add definition for Xilinx Spartan-6 XC6SLX4 2012-01-05T15:18:30+00:00 Stefano Babic sbabic@denx.de 2011-12-28T06:47:00+00:00 28cdc1c8e2682a008c8da15ce8fa153f6f01ea95 Signed-off-by: Stefano Babic <sbabic@denx.de> 
Signed-off-by: Stefano Babic <sbabic@denx.de>
fpga: constify to fix build warning 2011-08-01T13:19:40+00:00 Wolfgang Denk wd@denx.de 2011-07-30T13:33:49+00:00 e6a857da746d5d7d450e59c0f86664c6b279b1c2 Fix compiler warning: cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data' from incompatible pointer type Adding the needed 'const' here entails a whole bunch of additonal changes all over the FPGA code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andre Schwarz <andre.schwarz@matrix-vision.de> Cc: Murray Jensen <Murray.Jensen@csiro.au> Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de> 
Fix compiler warning:

cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data'
from incompatible pointer type

Adding the needed 'const' here entails a whole bunch of additonal
changes all over the FPGA code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andre Schwarz <andre.schwarz@matrix-vision.de>
Cc: Murray Jensen <Murray.Jensen@csiro.au>
Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>
add Xilinx_abort_fn to Xilinx_Spartan3_Slave_Serial_fns 2010-11-30T20:59:21+00:00 Wolfgang Wegner w.wegner@astro-kom.de 2010-04-23T09:08:05+00:00 b0bc8b70ff74501fd7a6e42013a4a7ea05cf6ade Currently the hardware was left in an undefined state in case Spartan3 serial load failed. This patch adds Xilinx_abort_fn to give the board a possibility to clean up in this case. Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de> 
Currently the hardware was left in an undefined state in case Spartan3
serial load failed. This patch adds Xilinx_abort_fn to give the board
a possibility to clean up in this case.

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
add block write function to spartan3 slave serial load 2010-03-24T16:08:43+00:00 Wolfgang Wegner w.wegner@astro-kom.de 2009-10-30T15:55:02+00:00 89083346d0627a5e6e271e61bd34ab5121f9462b Using seperate function calls for each bit-bang of slave serial load can be painfully slow. This patch adds the possibility to supply a block write function that loads the complete block of data in one call (like it can already be done with Altera FPGAs). On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load time from around 15 seconds to around 3 seconds Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de> 
Using seperate function calls for each bit-bang of slave serial
load can be painfully slow. This patch adds the possibility to
supply a block write function that loads the complete block of
data in one call (like it can already be done with Altera FPGAs).
On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load
time from around 15 seconds to around 3 seconds

Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>