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<title>u-boot.git/include/spi.h, branch v2013.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>sf: Minor cleanups.</title>
<updated>2013-10-15T18:44:00+00:00</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jaganna@xilinx.com</email>
</author>
<published>2013-10-10T16:44:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=469146c0977436c0803590ef6a0de368cab5b946'/>
<id>469146c0977436c0803590ef6a0de368cab5b946</id>
<content type='text'>
- Add comments.
- Renamed few macros.
- Add tabs.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
Signed-off-by: Bo Shen &lt;voice.shen@atmel.com&gt;
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<pre>
- Add comments.
- Renamed few macros.
- Add tabs.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
Signed-off-by: Bo Shen &lt;voice.shen@atmel.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>sf: Minor cleanups</title>
<updated>2013-10-07T14:04:56+00:00</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jaganna@xilinx.com</email>
</author>
<published>2013-10-07T14:04:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ce22b922dd1fdd3f6cb25660e6e845d4f1cb4f70'/>
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<content type='text'>
- Add spaces, tabs
- Commenting.
- Rearrange code.
- Add static qualifier for missing func.
- Remove memory_map from ramtron.c
- Ramtron: spi_flash_internal.h -&gt; sf_internal.h

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
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<pre>
- Add spaces, tabs
- Commenting.
- Rearrange code.
- Add static qualifier for missing func.
- Remove memory_map from ramtron.c
- Ramtron: spi_flash_internal.h -&gt; sf_internal.h

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sf: Add memory mapped read support</title>
<updated>2013-10-07T12:25:51+00:00</updated>
<author>
<name>Poddar, Sourav</name>
<email>sourav.poddar@ti.com</email>
</author>
<published>2013-10-07T10:23:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=004f15b6000e220b74433b190e60805ce8776d92'/>
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<content type='text'>
Qspi controller can have a memory mapped port which can be used for
data read. Added support to enable memory mapped port read.

This patch enables the following:
- It enables exchange of memory map address between mtd and qspi
through the introduction of "memory_map" flag.
- Add support to communicate to the driver that memory mapped
 transfer is to be started through introduction of new flags like
"SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END".

This will enable the spi controller to do memory mapped configurations
if required.

Signed-off-by: Sourav Poddar &lt;sourav.poddar@ti.com&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
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<pre>
Qspi controller can have a memory mapped port which can be used for
data read. Added support to enable memory mapped port read.

This patch enables the following:
- It enables exchange of memory map address between mtd and qspi
through the introduction of "memory_map" flag.
- Add support to communicate to the driver that memory mapped
 transfer is to be started through introduction of new flags like
"SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END".

This will enable the spi controller to do memory mapped configurations
if required.

Signed-off-by: Sourav Poddar &lt;sourav.poddar@ti.com&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: spi cleanups</title>
<updated>2013-10-07T12:25:49+00:00</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jaganna@xilinx.com</email>
</author>
<published>2013-09-25T10:17:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1b1bd9a7b3d6ac65fc73cd05dc7cb013e453e14b'/>
<id>1b1bd9a7b3d6ac65fc73cd05dc7cb013e453e14b</id>
<content type='text'>
- Rearranged multi-line comment style.
- Add tabs.
- Add spaces.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</content>
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<pre>
- Rearranged multi-line comment style.
- Add tabs.
- Add spaces.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add GPL-2.0+ SPDX-License-Identifier to source files</title>
<updated>2013-07-24T13:44:38+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-08T07:37:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1a4596601fd395f3afb8f82f3f840c5e00bdd57a'/>
<id>1a4596601fd395f3afb8f82f3f840c5e00bdd57a</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
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<pre>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>cros: exynos: add SPI support for cros_ec</title>
<updated>2013-06-26T14:13:24+00:00</updated>
<author>
<name>Hung-ying Tyan</name>
<email>tyanh@chromium.org</email>
</author>
<published>2013-05-15T10:27:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f3424c554c572761f35b00988deb8ed35d1870e3'/>
<id>f3424c554c572761f35b00988deb8ed35d1870e3</id>
<content type='text'>
This patch adds SPI support for carrying out the cros_ec protocol.

Signed-off-by: Hung-ying Tyan &lt;tyanh@chromium.org&gt;
Signed-off-by: Randall Spangler &lt;rspangler@chromium.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This patch adds SPI support for carrying out the cros_ec protocol.

Signed-off-by: Hung-ying Tyan &lt;tyanh@chromium.org&gt;
Signed-off-by: Randall Spangler &lt;rspangler@chromium.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: Add support for preamble bytes</title>
<updated>2013-06-02T18:34:40+00:00</updated>
<author>
<name>Rajeshwari Shinde</name>
<email>rajeshwari.s@samsung.com</email>
</author>
<published>2013-05-28T20:10:37+00:00</published>
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<id>bb786b84bdbcfe0474d53a54c82c5695494a6ab5</id>
<content type='text'>
A SPI slave may take time to react to a request. For SPI flash devices
this time is defined as one bit time, or a whole byte for 'fast read'
mode.

If the SPI slave is another CPU, then the time it takes to react may
vary. It is convenient to allow the slave device to tag the start of
the actual reply so that the host can determine when this 'preamble'
finishes and the actual message starts.

Add a preamble flag to the available SPI flags. If supported by the
driver then it will ignore any received bytes before the preamble
on each transaction. This ensures that reliable communication with
the slave is possible.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Rajeshwari Shinde &lt;rajeshwari.s@samsung.com&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
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<pre>
A SPI slave may take time to react to a request. For SPI flash devices
this time is defined as one bit time, or a whole byte for 'fast read'
mode.

If the SPI slave is another CPU, then the time it takes to react may
vary. It is convenient to allow the slave device to tag the start of
the actual reply so that the host can determine when this 'preamble'
finishes and the actual message starts.

Add a preamble flag to the available SPI flags. If supported by the
driver then it will ignore any received bytes before the preamble
on each transaction. This ensures that reliable communication with
the slave is possible.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Rajeshwari Shinde &lt;rajeshwari.s@samsung.com&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: Add parameter for maximum write size</title>
<updated>2013-03-19T15:45:36+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-03-11T06:08:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0c456cee952f3fa5ae6f5c42f960eeaa39140b62'/>
<id>0c456cee952f3fa5ae6f5c42f960eeaa39140b62</id>
<content type='text'>
Some SPI controllers (e.g. Intel ICH) have a limit on the number of SPI
bytes that can be written at a time. Add this as a parameter so that
clients of the SPI interface can respect this value.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Some SPI controllers (e.g. Intel ICH) have a limit on the number of SPI
bytes that can be written at a time. Add this as a parameter so that
clients of the SPI interface can respect this value.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: Add function to allocate a new SPI slave</title>
<updated>2013-03-19T15:45:36+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-03-11T06:08:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ba6c3ce9bd0ac572592dc909878117dce219c564'/>
<id>ba6c3ce9bd0ac572592dc909878117dce219c564</id>
<content type='text'>
At present it is difficult to extend the SPI structure since all
drivers allocate it themselves, and few of them zero all fields. Add
a new function spi_alloc_slave() which can be used by SPI drivers
to perform this allocation, and thus ensure that all drivers can
better cope with SPI structure changes.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
At present it is difficult to extend the SPI structure since all
drivers allocate it themselves, and few of them zero all fields. Add
a new function spi_alloc_slave() which can be used by SPI drivers
to perform this allocation, and thus ensure that all drivers can
better cope with SPI structure changes.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: eSPI and eSPI controller support</title>
<updated>2011-04-29T12:34:09+00:00</updated>
<author>
<name>Mingkai Hu</name>
<email>Mingkai.hu@freescale.com</email>
</author>
<published>2011-04-26T08:31:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=273feafefdde6a04cabc0389c7a68f7d7706e990'/>
<id>273feafefdde6a04cabc0389c7a68f7d7706e990</id>
<content type='text'>
Signed-off-by: Mingkai Hu &lt;Mingkai.hu@freescale.com&gt;
Singed-off-by: Jerry Huang &lt;Chang-Ming.Huang@freescale.com&gt;
Signed-off-by: Shaohui Xie &lt;b21989@freescale.com&gt;
Cc: Mike Frysinger &lt;vapier@gentoo.org&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
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<pre>
Signed-off-by: Mingkai Hu &lt;Mingkai.hu@freescale.com&gt;
Singed-off-by: Jerry Huang &lt;Chang-Ming.Huang@freescale.com&gt;
Signed-off-by: Shaohui Xie &lt;b21989@freescale.com&gt;
Cc: Mike Frysinger &lt;vapier@gentoo.org&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
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</content>
</entry>
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