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<title>u-boot.git/include/usb, branch v2014.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>drivers/usb : Define usb control register mask for w1c bits</title>
<updated>2014-05-16T21:24:27+00:00</updated>
<author>
<name>Nikhil Badola</name>
<email>nikhil.badola@freescale.com</email>
</author>
<published>2014-05-08T11:35:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=15231f6dd14b592e2bdef33f6aea1ca1d88fd1bf'/>
<id>15231f6dd14b592e2bdef33f6aea1ca1d88fd1bf</id>
<content type='text'>
Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bit

Signed-off-by: Nikhil Badola &lt;nikhil.badola@freescale.com&gt;
Signed-off-by: Ramneek Mehresh &lt;ramneek.mehresh@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bit

Signed-off-by: Nikhil Badola &lt;nikhil.badola@freescale.com&gt;
Signed-off-by: Ramneek Mehresh &lt;ramneek.mehresh@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fsl/usb: Increase TXFIFOTHRESH value for usb write in T4 Rev 2.0</title>
<updated>2014-04-23T00:58:49+00:00</updated>
<author>
<name>Nikhil Badola</name>
<email>nikhil.badola@freescale.com</email>
</author>
<published>2014-04-07T03:16:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=896720ceb2cededcd1f25fa5f5ff23822bea466d'/>
<id>896720ceb2cededcd1f25fa5f5ff23822bea466d</id>
<content type='text'>
Increase TXFIFOTHRES field value in TXFILLTUNING register of usb for T4 Rev 2.0.
This decreases data burst rate with which data packets are posted from the TX
latency FIFO to compensate for latencies in DDR pipeline during DMA.
This avoids Tx buffer underruns and leads to successful usb writes

Signed-off-by: Ramneek Mehresh &lt;ramneek.mehresh@freescale.com&gt;
Signed-off-by: Nikhil Badola &lt;nikhil.badola@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Increase TXFIFOTHRES field value in TXFILLTUNING register of usb for T4 Rev 2.0.
This decreases data burst rate with which data packets are posted from the TX
latency FIFO to compensate for latencies in DDR pipeline during DMA.
This avoids Tx buffer underruns and leads to successful usb writes

Signed-off-by: Ramneek Mehresh &lt;ramneek.mehresh@freescale.com&gt;
Signed-off-by: Nikhil Badola &lt;nikhil.badola@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sizes.h - consolidate for all architectures</title>
<updated>2014-03-04T17:15:01+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>Alexey.Brodkin@synopsys.com</email>
</author>
<published>2014-02-26T13:47:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1ace4022394eacbdae12e7275c445699f8ad4833'/>
<id>1ace4022394eacbdae12e7275c445699f8ad4833</id>
<content type='text'>
Copied from Linux sources "include/linux/sizes.h" commit
413541dd66d51f791a0b169d9b9014e4f56be13c

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;

Cc: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Tom Rini &lt;trini@ti.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Acked-by: Tom Rini &lt;trini@ti.com&gt;
Acked-by: Stefan Roese &lt;sr@denx.de&gt;
[trini: Add bcm Kona platforms to the patch]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Copied from Linux sources "include/linux/sizes.h" commit
413541dd66d51f791a0b169d9b9014e4f56be13c

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;

Cc: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Tom Rini &lt;trini@ti.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Acked-by: Tom Rini &lt;trini@ti.com&gt;
Acked-by: Stefan Roese &lt;sr@denx.de&gt;
[trini: Add bcm Kona platforms to the patch]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>include/usb/s3c_udc.h: Add &lt;asm/sizes.h&gt;</title>
<updated>2014-02-06T19:26:05+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-02-06T19:26:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=dbf3de2dd26cae37d16b00b348828c883b658cc5'/>
<id>dbf3de2dd26cae37d16b00b348828c883b658cc5</id>
<content type='text'>
With e0059ea switching to using SZ_1K, we need to #include &lt;asm/sizes.h&gt;
here for everyone to build still.

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With e0059ea switching to using SZ_1K, we need to #include &lt;asm/sizes.h&gt;
here for everyone to build still.

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>usb: mv_udc: Rename to ci_udc</title>
<updated>2014-02-06T03:48:15+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2014-02-06T01:43:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f016f8ca3d503af004a649de1c704d5ddf3def22'/>
<id>f016f8ca3d503af004a649de1c704d5ddf3def22</id>
<content type='text'>
The mv_udc is not marvell-specific anymore. The mv_udc is used to drive
generic ChipIdea CI13xxx series OTG cores, so rename the driver to ci_udc
instead.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Eric Nelson &lt;eric.nelson@boundarydevices.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The mv_udc is not marvell-specific anymore. The mv_udc is used to drive
generic ChipIdea CI13xxx series OTG cores, so rename the driver to ci_udc
instead.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Eric Nelson &lt;eric.nelson@boundarydevices.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>usb:udc:samsung: Zero copy approach for data passed to Samsung's UDC driver</title>
<updated>2014-02-06T01:22:45+00:00</updated>
<author>
<name>Lukasz Majewski</name>
<email>l.majewski@samsung.com</email>
</author>
<published>2014-02-05T09:10:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e0059eaef18dbdc65ee420a337aecfa555e8d493'/>
<id>e0059eaef18dbdc65ee420a337aecfa555e8d493</id>
<content type='text'>
The Samsung's UDC driver is not anymore copying data from USB requests to
aligned internal buffers. Now it works directly in data allocated in the
upper layers like UMS, DFU, THOR.

This change is possible since those gadgets now must take care to allocate
buffers aligned to cache line (CONFIG_SYS_CACHELINE_SIZE).

This can be achieved by using DEFINE_CACHE_ALIGN_BUFFER() or
ALLOC_CACHE_ALIGN_BUFFER() macros. Those take care to allocate buffer
aligned to cache line in both starting address and its size.
Sometimes it is enough to just use memalign() with size being a
multiplication of cache line size.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurement:
Transmission speed: 27.04 MiB/s

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Samsung's UDC driver is not anymore copying data from USB requests to
aligned internal buffers. Now it works directly in data allocated in the
upper layers like UMS, DFU, THOR.

This change is possible since those gadgets now must take care to allocate
buffers aligned to cache line (CONFIG_SYS_CACHELINE_SIZE).

This can be achieved by using DEFINE_CACHE_ALIGN_BUFFER() or
ALLOC_CACHE_ALIGN_BUFFER() macros. Those take care to allocate buffer
aligned to cache line in both starting address and its size.
Sometimes it is enough to just use memalign() with size being a
multiplication of cache line size.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurement:
Transmission speed: 27.04 MiB/s

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/usb:Differentiate USB controller base address</title>
<updated>2013-10-24T16:35:09+00:00</updated>
<author>
<name>ramneek mehresh</name>
<email>ramneek.mehresh@freescale.com</email>
</author>
<published>2013-09-12T11:05:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=77354e9d502837c156149109f4dd36b7bc12d6b3'/>
<id>77354e9d502837c156149109f4dd36b7bc12d6b3</id>
<content type='text'>
Introduce different macros for storing addresses of multiple
USB controllers. This is required for successful initialization
and usage of multiple USB controllers inside u-boot

Signed-off-by: Ramneek Mehresh &lt;ramneek.mehresh@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduce different macros for storing addresses of multiple
USB controllers. This is required for successful initialization
and usage of multiple USB controllers inside u-boot

Signed-off-by: Ramneek Mehresh &lt;ramneek.mehresh@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>usb: udc: add udc.h include file</title>
<updated>2013-10-20T21:46:38+00:00</updated>
<author>
<name>Troy Kisky</name>
<email>troy.kisky@boundarydevices.com</email>
</author>
<published>2013-10-10T22:28:04+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=449697f14ebc9f7cb5bf15bbad0d46c6ca2c4979'/>
<id>449697f14ebc9f7cb5bf15bbad0d46c6ca2c4979</id>
<content type='text'>
Move common definitions to udc.h
This allows musb_udc.h to be removed as well.

Signed-off-by: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move common definitions to udc.h
This allows musb_udc.h to be removed as well.

Signed-off-by: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>usb: gadget: mv_udc: split mv_udc.h file</title>
<updated>2013-10-20T21:46:36+00:00</updated>
<author>
<name>Troy Kisky</name>
<email>troy.kisky@boundarydevices.com</email>
</author>
<published>2013-10-10T22:28:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0f740cb8e48eb7c90e7977def98601c929101446'/>
<id>0f740cb8e48eb7c90e7977def98601c929101446</id>
<content type='text'>
Move defines only needed by mv_udc.c to a file
in the same directory.

This allows usbtty to compile for mv_udc,
but it still doesn't link.

Signed-off-by: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move defines only needed by mv_udc.c to a file
in the same directory.

This allows usbtty to compile for mv_udc,
but it still doesn't link.

Signed-off-by: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>usb: mv_udc: Add bounce buffer</title>
<updated>2013-07-29T21:01:33+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2013-07-10T01:16:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6dd30af0fa5c2f509f6f789789151268bdfcde0c'/>
<id>6dd30af0fa5c2f509f6f789789151268bdfcde0c</id>
<content type='text'>
The requests sent to the controller are not properly cache aligned
most of the time, thus implement a simple bounce buffer to avoid
problem with cache.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Cc: Lei Wen &lt;leiwen@marvell.com&gt;
Cc: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The requests sent to the controller are not properly cache aligned
most of the time, thus implement a simple bounce buffer to avoid
problem with cache.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Cc: Lei Wen &lt;leiwen@marvell.com&gt;
Cc: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
