Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
[mb: squash fix to only build xhci_reset_hw() if CONFIG_DM_BUS]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>

There might be hardware configurations where 64-bit data accesses
to XHCI registers are not supported properly.  This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit XHCI registers, similarly as it is done in Linux kernel.

This patch fixes operation of the XHCI controller on RPI4 Broadcom
BCM2711 SoC based board, where the VL805 USB XHCI controller is
connected to the PCIe Root Complex, which is attached to the system
through the SCB bridge.

Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
xhci_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234.

Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>

This patch is used to support the on-chip xHCI controller on
MediaTek SoCs, currently control/bulk/interrupt transfers are
supported.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

Migrate to use ofnode_* instead of fdt_* so that we may able to use live
dt for usb udc driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

The xhci.h header file is currently located under drivers/usb/xhci
Move it to the include/usb folder to make it available to drivers that
are not under drivers/usb/xhci

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>

Replace CONFIG_MPC834* with proper CONFIG_ARCH_MPC834* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>

Add compatible "st,stm32mp1-hsotg" and associated driver data to manage
the usb33d-supply and the ST specific register for VBus sensing.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
# Conflicts:
#	drivers/usb/gadget/dwc2_udc_otg.c
Reviewed-by: Lukasz Majewski <lukma@denx.de>

All TX fifo size can be different, add tx_fifo_sz_array[]
into dwc2_plat_otg_data to be able to set them.

tx_fifo_sz_array[] is 17 Bytes long and can contains max 16
tx fifo size (synopsys IP supports max 16 IN endpoints).
First entry of tx_fifo_sz_array[] is the number of valid
fifo size the array contains.

In case of tx_fifo_sz_array[] doesn't contains the same
number of element than max hardware endpoint, display
a warning message.

Compatibility with board which doesn't use tx_fifo_sz_array[]
(Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>

Add a new function to check the session B validity, to be use to check
cable connection.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>

Handle "force-b-session-valid" property from DT.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>