u-boot.git/include/xilinx.h, branch v2018.09 Unnamed repository; edit this file 'description' to name the repository. fpga: zynqmp: Add secure bitstream loading for ZynqMP 2018-06-01T09:37:31+00:00 Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com 2018-05-31T09:40:23+00:00 a18d09ea384fb66105fbfa24fd2d1288754b8f07 This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
This patch adds support for loading secure bitstreams on ZynqMP
platforms. The secure bitstream images has to be generated using
Xilinx bootgen tool.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07T13:34:12+00:00 Tom Rini trini@konsulko.com 2018-05-06T21:58:06+00:00 83d290c56fab2d38cd1ab4c4cc7099559c1d5046 When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP 2016-09-22T05:33:21+00:00 Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com 2016-01-13T10:55:37+00:00 6b2450143882987f4287ea78783866c5f9ac4aff Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to ATF which route this request to
PMU FW which will take care of loading it to PL

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: Added support to load bit stream from SD/MMC 2014-05-20T13:23:46+00:00 Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com 2014-03-14T11:05:37+00:00 1a897668ac33c57ca76f47cb940ec32b405e90dd Added support to load a bitstream image in chunks by reading it in chunks from SD/MMC. Command format: loadfs [dev] [address] [image size] [blocksize] <interface> [<dev[:part]>] <filename> Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Added support to load a bitstream image in chunks by reading it in
chunks from SD/MMC.
Command format:
loadfs [dev] [address] [image size] [blocksize] <interface>
       [<dev[:part]>] <filename>
Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: Define bitstream type based on command selection 2014-05-20T13:23:46+00:00 Michal Simek michal.simek@xilinx.com 2014-05-02T12:09:30+00:00 7a78bd2679ce3287cfc44f69fd7bc554d0261cf6 Clean up partial, full and compressed bitstream handling. U-Boot supports full bitstream loading and partial based on detection which is not 100% correct. Extending fpga_load/fpga_loadbitstream() with one more argument which stores bitstream type. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: xilinx: Simplify load/dump/info function handling 2014-05-13T07:13:59+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T12:07:57+00:00 14cfc4f3735d9704cb6a630ef302be596d380684 Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: xilinx: Fix the rest of CamelCases 2014-05-13T07:13:49+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T11:58:20+00:00 2df9d5c431fca07c9868a36b48ee771bde6b19e8 No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: xilinx: Avoid CamelCase for in Xilinx_desc 2014-05-13T07:12:53+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T11:49:21+00:00 f8c1be9816a60d1f627954fe202b502917c69863 No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: virtex2: Avoid CamelCase 2014-05-13T07:12:53+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T10:33:36+00:00 d9071ce0a8cd684589c9c35e4d7c604a9cbd7d62 No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: spartan3: Avoid CamelCase 2014-05-13T07:12:52+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T10:28:42+00:00 2a6e3869f25093cd4032a3cd64ee455afbd668bf No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>