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<title>u-boot.git/include/xilinx.h, branch v2022.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>fpga: zynqmp: support loading encrypted bitfiles</title>
<updated>2022-07-26T07:34:21+00:00</updated>
<author>
<name>Adrian Fiergolski</name>
<email>adrian.fiergolski@fastree3d.com</email>
</author>
<published>2022-07-22T14:16:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b524f8fb1e94a8e649ba06a7cb87e6dcaa96ebc3'/>
<id>b524f8fb1e94a8e649ba06a7cb87e6dcaa96ebc3</id>
<content type='text'>
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to
handle loading encrypted bitfiles.

This feature requires encrypted FSBL, as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM
 or eFUSEs, as a key source to the AES engine if the FSBL is not
 encrypted. This prevents using the BBRAM or eFUSE as the key source
 to the AES engine during run-time applications."

Signed-off-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Co-developed-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-14-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to
handle loading encrypted bitfiles.

This feature requires encrypted FSBL, as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM
 or eFUSEs, as a key source to the AES engine if the FSBL is not
 encrypted. This prevents using the BBRAM or eFUSE as the key source
 to the AES engine during run-time applications."

Signed-off-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Co-developed-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-14-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: zynqmp: support loading authenticated images</title>
<updated>2022-07-26T07:34:21+00:00</updated>
<author>
<name>Oleksandr Suvorov</name>
<email>oleksandr.suvorov@foundries.io</email>
</author>
<published>2022-07-22T14:16:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a3a1afb747d4d71c3dd5ba01b2796cebd65c65cd'/>
<id>a3a1afb747d4d71c3dd5ba01b2796cebd65c65cd</id>
<content type='text'>
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to
handle loading authenticated images (DDR).

Based on solution by Jorge Ramirez-Ortiz &lt;jorge@foundries.io&gt;

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-13-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to
handle loading authenticated images (DDR).

Based on solution by Jorge Ramirez-Ortiz &lt;jorge@foundries.io&gt;

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-13-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: xilinx: pass compatible flags to load() callback</title>
<updated>2022-07-26T07:34:21+00:00</updated>
<author>
<name>Oleksandr Suvorov</name>
<email>oleksandr.suvorov@foundries.io</email>
</author>
<published>2022-07-22T14:16:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3e78481de94d94f753bbf05486734b8da394643f'/>
<id>3e78481de94d94f753bbf05486734b8da394643f</id>
<content type='text'>
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-10-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-10-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: xilinx: pass compatible flags to xilinx_load()</title>
<updated>2022-07-26T07:34:21+00:00</updated>
<author>
<name>Oleksandr Suvorov</name>
<email>oleksandr.suvorov@foundries.io</email>
</author>
<published>2022-07-22T14:16:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a9a0df89bf1cb9f7e78378f946f1d9c9b002d72'/>
<id>7a9a0df89bf1cb9f7e78378f946f1d9c9b002d72</id>
<content type='text'>
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-6-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-6-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: zynqmp: add str2flags call</title>
<updated>2022-07-26T07:34:21+00:00</updated>
<author>
<name>Oleksandr Suvorov</name>
<email>oleksandr.suvorov@foundries.io</email>
</author>
<published>2022-07-22T14:16:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=24307b06b71a3c9b4aa556eefdad1f8fcca116bd'/>
<id>24307b06b71a3c9b4aa556eefdad1f8fcca116bd</id>
<content type='text'>
Add a call to convert FPGA "compatible" string to a binary flag.

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-5-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a call to convert FPGA "compatible" string to a binary flag.

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-5-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: xilinx: add bitstream flags to driver desc</title>
<updated>2022-07-26T07:34:21+00:00</updated>
<author>
<name>Oleksandr Suvorov</name>
<email>oleksandr.suvorov@foundries.io</email>
</author>
<published>2022-07-22T14:16:04+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d7fcbfc19b4e83930a90c834046d4bf7dc3adefe'/>
<id>d7fcbfc19b4e83930a90c834046d4bf7dc3adefe</id>
<content type='text'>
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: xilinx: add missed identifier names</title>
<updated>2022-07-26T07:34:21+00:00</updated>
<author>
<name>Oleksandr Suvorov</name>
<email>oleksandr.suvorov@foundries.io</email>
</author>
<published>2022-07-22T14:16:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f18adf106576f298ead743a02800c6fdc90d884c'/>
<id>f18adf106576f298ead743a02800c6fdc90d884c</id>
<content type='text'>
Function definition arguments should also have identifier names.
Add missed ones to struct xilinx_fpga_op callbacks, unifying code.

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-3-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Function definition arguments should also have identifier names.
Add missed ones to struct xilinx_fpga_op callbacks, unifying code.

Signed-off-by: Oleksandr Suvorov &lt;oleksandr.suvorov@foundries.io&gt;
Tested-by: Ricardo Salveti &lt;ricardo@foundries.io&gt;
Tested-by: Adrian Fiergolski &lt;adrian.fiergolski@fastree3d.com&gt;
Link: https://lore.kernel.org/r/20220722141614.297383-3-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: versal: fpga: Add PL bit stream load support</title>
<updated>2019-10-08T07:11:14+00:00</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2019-08-05T10:24:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=26e054c943a7348904a8b432fc9a85185b0861c7'/>
<id>26e054c943a7348904a8b432fc9a85185b0861c7</id>
<content type='text'>
This patch adds PL bitstream load support for Versal platform. The PL
bitstream is loaded by making an SMC to ATF which in turn communicates
with platform firmware which configures and loads PL bitstream on to PL.

Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds PL bitstream load support for Versal platform. The PL
bitstream is loaded by making an SMC to ATF which in turn communicates
with platform firmware which configures and loads PL bitstream on to PL.

Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: zynqmp: Add secure bitstream loading for ZynqMP</title>
<updated>2018-06-01T09:37:31+00:00</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2018-05-31T09:40:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a18d09ea384fb66105fbfa24fd2d1288754b8f07'/>
<id>a18d09ea384fb66105fbfa24fd2d1288754b8f07</id>
<content type='text'>
This patch adds support for loading secure bitstreams on ZynqMP
platforms. The secure bitstream images has to be generated using
Xilinx bootgen tool.

Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for loading secure bitstreams on ZynqMP
platforms. The secure bitstream images has to be generated using
Xilinx bootgen tool.

Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=83d290c56fab2d38cd1ab4c4cc7099559c1d5046'/>
<id>83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
