u-boot.git/include/zynqpl.h, branch v2016.09 Unnamed repository; edit this file 'description' to name the repository. fpga: zynqpl: Add support for zc7035 2015-01-21T09:25:53+00:00 Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com 2014-11-25T09:59:54+00:00 b9103809eb9052f40479d2d741e980832b75ebba Added support for zc7035 Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Added support for zc7035

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: xilinx: zynqpl: Setup NULL fpga_op without driver 2015-01-21T09:25:03+00:00 Michal Simek michal.simek@xilinx.com 2014-07-16T08:47:13+00:00 345f9e195675207372efbb492f29dcfdcb938fd7 Set fpga operations to NULL for cases where FPGA is setup in board file but driver is not added Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: xilinx: Simplify load/dump/info function handling 2014-05-13T07:13:59+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T12:07:57+00:00 14cfc4f3735d9704cb6a630ef302be596d380684 Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: xilinx: Avoid CamelCase for in Xilinx_desc 2014-05-13T07:12:53+00:00 Michal Simek michal.simek@xilinx.com 2014-03-13T11:49:21+00:00 f8c1be9816a60d1f627954fe202b502917c69863 No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: zynqpl: Add support for zc7015 device 2014-02-06T09:08:14+00:00 Michal Simek michal.simek@xilinx.com 2013-09-26T14:39:03+00:00 31993d6a3585d478d792fc70240129b0ca03f55f Just extend tables with this new device. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Just extend tables with this new device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: zynqpl: Add support for zc7100 device. 2013-08-12T06:01:50+00:00 Michal Simek michal.simek@xilinx.com 2013-06-17T11:54:07+00:00 fd2b10b6d6a0d5e94d6b34faa634e9722a5465a8 - Add support for zc7100 device. - FPGA programming on few of the SOC(zc7100) takes more than 1sec, hence increased the program time by 4sec to sync' all soc's. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
- Add support for zc7100 device.
- FPGA programming on few of the SOC(zc7100) takes more
  than 1sec, hence increased the program time by 4sec to
  sync' all soc's.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24T13:44:38+00:00 Wolfgang Denk wd@denx.de 2013-07-08T07:37:19+00:00 1a4596601fd395f3afb8f82f3f840c5e00bdd57a Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
fpga: Check device name against bitstream name 2013-05-06T08:41:25+00:00 Michal Simek michal.simek@xilinx.com 2013-04-26T13:04:48+00:00 6631db4773cd735688bf3332173a49271df23385 Ensure that wrong bitstream won't be loaded to current device. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com> 
Ensure that wrong bitstream won't be loaded
to current device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
fpga: zynq: Add support for loading bitstream 2013-05-06T08:41:24+00:00 Michal Simek michal.simek@xilinx.com 2013-04-22T13:43:02+00:00 d5dae85f23c7c902731512e451afde9a6e4a250a Devcfg device requires to load bitstream in binary format. But u-boot also has an option for loading bitstream in bit format. Let's handle both cases by zynqpl driver. Also add suport for loading partial bitstreams. The first driver version was done by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com> 
Devcfg device requires to load bitstream in binary format.
But u-boot also has an option for loading bitstream in bit
format. Let's handle both cases by zynqpl driver.
Also add suport for loading partial bitstreams.

The first driver version was done by:
Joe Hershberger <joe.hershberger@ni.com>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>