u-boot.git/include, branch v2019.01-rc1 Unnamed repository; edit this file 'description' to name the repository. Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze 2018-12-04T00:30:54+00:00 Tom Rini trini@konsulko.com 2018-12-04T00:30:54+00:00 0a3d59e01038a3a50484b8bfcf834376a7215af0 Xilinx changes for v2019.01 microblaze: - Use default functions for memory decoding - Showing model from DT zynq: - Fix spi flash DTs - Fix zynq_help_text with CONFIG_SYS_LONGHELP - Tune cse/mini configurations - Enabling cse/mini testing with current targets zynqmp: - Enable gzip SPL support - Fix chip detection logic - Tune mini configurations - DT fixes(spi-flash, models, clocks, etc) - Add support for OF_SEPARATE configurations - Enabling mini testing with current targets - Add mini mtest configuration - Some minor config setting nand: - arasan: Add subpage configuration net: - gem: Add 64bit DMA support 
Xilinx changes for v2019.01

microblaze:
- Use default functions for memory decoding
- Showing model from DT

zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets

zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting

nand:
- arasan: Add subpage configuration

net:
- gem: Add 64bit DMA support
Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot 2018-12-03T22:52:53+00:00 Tom Rini trini@konsulko.com 2018-12-03T22:52:53+00:00 9981c60ef583f3608eff8ab4837198f72240ea17 Patch queue for rpi - 2018-12-03 A few Raspberry Pi specific changes this time: - Allow 2nd MMC device - Support RPi 3 Model A+ - Allow UUID to find filesystem 
Patch queue for rpi - 2018-12-03

A few Raspberry Pi specific changes this time:

  - Allow 2nd MMC device
  - Support RPi 3 Model A+
  - Allow UUID to find filesystem
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot 2018-12-03T22:52:40+00:00 Tom Rini trini@konsulko.com 2018-12-03T22:52:40+00:00 f388e3bed7318efe97058b673801dda6f563d319 Patch queue for efi - 2018-12-03 This release is fully packed with lots of glorious improvements in UEFI land again! - Make PE images more standards compliant - Improve sandbox support - Improve correctness - Fix RISC-V execution on virt model - Honor board defined top of ram (fixes a few boards) - Imply DM USB access when distro boot is available - Code cleanups 
Patch queue for efi - 2018-12-03

This release is fully packed with lots of glorious improvements in UEFI
land again!

  - Make PE images more standards compliant
  - Improve sandbox support
  - Improve correctness
  - Fix RISC-V execution on virt model
  - Honor board defined top of ram (fixes a few boards)
  - Imply DM USB access when distro boot is available
  - Code cleanups
drivers: serial: get rid of non DM mpc8xx driver 2018-12-03T15:44:10+00:00 Christophe Leroy christophe.leroy@c-s.fr 2018-11-21T08:51:53+00:00 42b54013a08dbda78b466243f03ced249a7fbe84 Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> 
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
rsa: add support of padding pss 2018-12-03T15:44:10+00:00 Philippe Reynes philippe.reynes@softathome.com 2018-11-14T12:51:01+00:00 061daa0b61f0fbeb214c566f3adb23da05545320 We add the support of the padding pss for rsa signature. This new padding is often recommended instead of pkcs-1.5. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
We add the support of the padding pss for rsa signature.
This new padding is often recommended instead of pkcs-1.5.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
rsa: add a structure for the padding 2018-12-03T15:44:10+00:00 Philippe Reynes philippe.reynes@softathome.com 2018-11-14T12:51:00+00:00 20031567e12bb312bff95b70767f6275e20f0346 The rsa signature use a padding algorithm. By default, we use the padding pkcs-1.5. In order to add some new padding algorithm, we add a padding framework to manage several padding algorithm. The choice of the padding is done in the file .its. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
The rsa signature use a padding algorithm. By default, we use the
padding pkcs-1.5. In order to add some new padding algorithm, we
add a padding framework to manage several padding algorithm.
The choice of the padding is done in the file .its.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kconfig: Migrate CONFIG_RTC_M41T62 define to Kconfig 2018-12-03T15:44:10+00:00 Lukasz Majewski lukma@denx.de 2018-11-22T13:54:31+00:00 d27db67e6b130972441ea27344d09395dee0ae42 This patch moves the RTC M41T62 config define to Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> 
This patch moves the RTC M41T62 config define to Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
arm: baltos: migrate Ethernet PHYs configuration to Kconfig 2018-12-03T15:44:10+00:00 Yegor Yefremov yegorslists@googlemail.com 2018-11-22T08:19:33+00:00 8ce7f2c11577a0353a1bc7ddeff3c751f66f3521 Remove CONFIG_PHY_ATHEROS and CONFIG_PHY_SMSC from defconfig and select them in Kconfig. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
Remove CONFIG_PHY_ATHEROS and CONFIG_PHY_SMSC from defconfig
and select them in Kconfig.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arm: baltos: move CONFIG_SYS_NAND_U_BOOT_OFFS to defconfig 2018-12-03T15:44:10+00:00 Yegor Yefremov yegorslists@googlemail.com 2018-11-22T08:19:32+00:00 1abff55a199b733c1addb8792db33ad5054bcd21 Also get rid of CONFIG_SYS_NAND_SPL_KERNEL_OFFS as SPL_OS_BOOT feature won't be used. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
Also get rid of CONFIG_SYS_NAND_SPL_KERNEL_OFFS as SPL_OS_BOOT
feature won't be used.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arm64: zynqmp: Add new header file for zcu104 RevC 2018-12-03T14:21:56+00:00 T Karthik Reddy t.karthik.reddy@xilinx.com 2018-12-03T14:05:09+00:00 332d185c37112a8994f809f3d355d6f293ef06f6 Created a new header file for zcu104 RevC board and added below configurations to use MAC address from EEPROM. CONFIG_ZYNQ_GEM_EEPROM_ADDR CONFIG_ZYNQ_EEPROM_BUS Added CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 to xilinx_zynqmp_zcu104_revC_defconfig Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
Created a new header file for zcu104 RevC board and added below
configurations to use MAC address from EEPROM.
	CONFIG_ZYNQ_GEM_EEPROM_ADDR
	CONFIG_ZYNQ_EEPROM_BUS
Added CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 to
xilinx_zynqmp_zcu104_revC_defconfig

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>