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<title>u-boot.git/include, branch v2023.04-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>arm: mvebu: Add support for Synology DS116 (Armada 385)</title>
<updated>2023-02-13T09:14:50+00:00</updated>
<author>
<name>Tony Dinh</name>
<email>mibodhi@gmail.com</email>
</author>
<published>2023-02-09T22:00:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b21f87a5a5e23a833c13f26819a04d80e0802600'/>
<id>b21f87a5a5e23a833c13f26819a04d80e0802600</id>
<content type='text'>
Synology DS116 is a NAS based on Marvell Armada 385 SoC.

Board Specification:

- Marvel MV88F6820 Dual Core at 1.8GHz
- 1 GiB DDR3 RAM
- 8MB Macronix mx25l6405d SPI flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 1x SATA (6 Gbps)
- 3x LED
- PIC16F1829 (connected to uart1)
- GPIO fan
- serial console

Note that this patch depends on the add-support for Thecus N2350 patch:
https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh &lt;mibodhi@gmail.com&gt;
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<pre>
Synology DS116 is a NAS based on Marvell Armada 385 SoC.

Board Specification:

- Marvel MV88F6820 Dual Core at 1.8GHz
- 1 GiB DDR3 RAM
- 8MB Macronix mx25l6405d SPI flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 1x SATA (6 Gbps)
- 3x LED
- PIC16F1829 (connected to uart1)
- GPIO fan
- serial console

Note that this patch depends on the add-support for Thecus N2350 patch:
https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh &lt;mibodhi@gmail.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>arm: mvebu: Add support for Thecus N2350 (Armada 385) board</title>
<updated>2023-02-13T09:14:50+00:00</updated>
<author>
<name>Tony Dinh</name>
<email>mibodhi@gmail.com</email>
</author>
<published>2023-02-01T23:13:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3fdd09f90f829e8f4e576c65772e9c80d8930d7d'/>
<id>3fdd09f90f829e8f4e576c65772e9c80d8930d7d</id>
<content type='text'>
Thecus N2350 is a NAS based on Marvell Armada 385 SoC.

Specification:

- Processor: Marvel MV88F6820 Dual Core at 1GHz
- 1 GiB DDR4 RAM
- 4MB Macronix mx25l3205d SPI flash
- 512MB Hynix H27U4G8F2DTR-BC NAND flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 2x SATA (hot swap slots)
- 3x buttons
- 10x LEDS
- serial console

Signed-off-by: Tony Dinh &lt;mibodhi@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
Thecus N2350 is a NAS based on Marvell Armada 385 SoC.

Specification:

- Processor: Marvel MV88F6820 Dual Core at 1GHz
- 1 GiB DDR4 RAM
- 4MB Macronix mx25l3205d SPI flash
- 512MB Hynix H27U4G8F2DTR-BC NAND flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 2x SATA (hot swap slots)
- 3x buttons
- 10x LEDS
- serial console

Signed-off-by: Tony Dinh &lt;mibodhi@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'clk-2023.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-clk</title>
<updated>2023-02-12T20:25:32+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-02-12T20:25:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9345f165eb52888a61f3a67546f7834dfb9238b2'/>
<id>9345f165eb52888a61f3a67546f7834dfb9238b2</id>
<content type='text'>
Clock changes for 2023.04-rc1

This contains various fixes and small features. I've included a reset patch as
well since it was in the same series as a clock patch.
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<pre>
Clock changes for 2023.04-rc1

This contains various fixes and small features. I've included a reset patch as
well since it was in the same series as a clock patch.
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'for-2023.04' of https://source.denx.de/u-boot/custodians/u-boot-mpc8xx</title>
<updated>2023-02-12T20:25:09+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-02-12T20:25:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=386e77cda8b690dbf5b2b7c828b3313205e5078c'/>
<id>386e77cda8b690dbf5b2b7c828b3313205e5078c</id>
<content type='text'>
- A fix for a long standing bug that has been exposed by commit
  50128aeb0f8 ("cyclic: get rid of cyclic_init()") preventing 8xx boards
  from booting since u-boot 2023.01
- A GPIO driver for powerpc 8xx chip
- Fixup for powerpc 8xx SPI driver
- A new powerpc 8xx board
- The two devices having that board.
</content>
<content type='xhtml'>
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<pre>
- A fix for a long standing bug that has been exposed by commit
  50128aeb0f8 ("cyclic: get rid of cyclic_init()") preventing 8xx boards
  from booting since u-boot 2023.01
- A GPIO driver for powerpc 8xx chip
- Fixup for powerpc 8xx SPI driver
- A new powerpc 8xx board
- The two devices having that board.
</pre>
</div>
</content>
</entry>
<entry>
<title>reset: Allow reset_get_by_name() with NULL name</title>
<updated>2023-02-12T18:44:20+00:00</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2023-01-22T00:02:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5a675abfe7c3f12b475cc0a6c9074a9fbe0b6bb6'/>
<id>5a675abfe7c3f12b475cc0a6c9074a9fbe0b6bb6</id>
<content type='text'>
This allows devm_reset_control_get(dev, NULL) to work and get the first
reset control, which is common in code ported from Linux.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Link: https://lore.kernel.org/r/20230122000252.53642-2-samuel@sholland.org
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<pre>
This allows devm_reset_control_get(dev, NULL) to work and get the first
reset control, which is common in code ported from Linux.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Link: https://lore.kernel.org/r/20230122000252.53642-2-samuel@sholland.org
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Allow clk_get_by_name() with NULL name</title>
<updated>2023-02-12T18:44:20+00:00</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2023-01-22T00:02:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2050f824e1367cb227d8e13a91c98577987fe413'/>
<id>2050f824e1367cb227d8e13a91c98577987fe413</id>
<content type='text'>
This allows devm_clock_get(dev, NULL) to work and get the first clock,
which is common in code ported from Linux.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Link: https://lore.kernel.org/r/20230122000252.53642-1-samuel@sholland.org
</content>
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<pre>
This allows devm_clock_get(dev, NULL) to work and get the first clock,
which is common in code ported from Linux.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Link: https://lore.kernel.org/r/20230122000252.53642-1-samuel@sholland.org
</pre>
</div>
</content>
</entry>
<entry>
<title>trace: Reduce the number of function sites</title>
<updated>2023-02-11T17:22:35+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-01-15T21:15:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c3d91812a2b69fbc73eccdcec70d7ea510d7c8bd'/>
<id>c3d91812a2b69fbc73eccdcec70d7ea510d7c8bd</id>
<content type='text'>
Given that the compiler adds two function calls into each function, the
current spacing is overkill. Drop it down to 16 bytes per function, which
is still plenty. This saves some space in the trace buffer.

Also move the calculation into a function, so it is common code. Add a
check for gd-&gt;mon_len being unset, which breaks tracing.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Given that the compiler adds two function calls into each function, the
current spacing is overkill. Drop it down to 16 bytes per function, which
is still plenty. This saves some space in the trace buffer.

Also move the calculation into a function, so it is common code. Add a
check for gd-&gt;mon_len being unset, which breaks tracing.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>trace: Update the file header</title>
<updated>2023-02-11T17:22:35+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-01-15T21:15:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d9044e5363bb0b32a7aff00adf47c227f78f0f32'/>
<id>d9044e5363bb0b32a7aff00adf47c227f78f0f32</id>
<content type='text'>
It seems better to put the TEXT_BASE value in the file header rather than
in an entry record. While it is true that there is a separate base for
pre-relocation, this can be handled by using offsets in the file.

It is useful to have a version number in case we need to change the trace
format again.

Update the header to make these changes.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It seems better to put the TEXT_BASE value in the file header rather than
in an entry record. While it is true that there is a separate base for
pre-relocation, this can be handled by using offsets in the file.

It is useful to have a version number in case we need to change the trace
format again.

Update the header to make these changes.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>timer: Tidy up use of notrace</title>
<updated>2023-02-11T17:22:34+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-01-15T21:15:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4aa5053da5fa0729d30bce5df9a0a037a391f2f3'/>
<id>4aa5053da5fa0729d30bce5df9a0a037a391f2f3</id>
<content type='text'>
Tracing is typically enabled by the time driver model starts up, so there
is no point in adding a 'notrace' to the timer-init function. However,
once the driver model timer is enabled, we do need to be able to access
the timer's private data when reading the timer, so add it to the core
function needed for that.

Update the function's documentation while we are here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Tracing is typically enabled by the time driver model starts up, so there
is no point in adding a 'notrace' to the timer-init function. However,
once the driver model timer is enabled, we do need to be able to access
the timer's private data when reading the timer, so add it to the core
function needed for that.

Update the function's documentation while we are here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>board: cssi: Add new board MCR3000_2G</title>
<updated>2023-02-11T07:47:58+00:00</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2022-10-14T10:54:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=dac3c6f625e03be0b5017b0d436c73aeeb1a673e'/>
<id>dac3c6f625e03be0b5017b0d436c73aeeb1a673e</id>
<content type='text'>
This adds a new board from CS GROUP. The board is called
MCR3000_2G, and has a CPU board called CMPC885.

That CPU board is shared with another equipment that will
be added in a later patch.

That board stores Ethernet MAC addresses in an EEPROM which
is accessed using SPI bus.

This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Reviewed-by: FRANJOU Stephane &lt;stephane.franjou@csgroup.eu&gt;
</content>
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<pre>
This adds a new board from CS GROUP. The board is called
MCR3000_2G, and has a CPU board called CMPC885.

That CPU board is shared with another equipment that will
be added in a later patch.

That board stores Ethernet MAC addresses in an EEPROM which
is accessed using SPI bus.

This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Reviewed-by: FRANJOU Stephane &lt;stephane.franjou@csgroup.eu&gt;
</pre>
</div>
</content>
</entry>
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