u-boot.git/include, branch v2025.01 Unnamed repository; edit this file 'description' to name the repository. Merge tag 'fsl-qoriq-2024-12-15' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq 2024-12-15T14:02:46+00:00 Tom Rini trini@konsulko.com 2024-12-15T14:02:46+00:00 50334151c02077f16613b0a082d95640800ba60e CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/23856 - Use strcat to replace sprintf for t208xqds - Fix bootefi for board ls1028a - Various fixes to sl28 board 
CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/23856

- Use strcat to replace sprintf for t208xqds
- Fix bootefi for board ls1028a
- Various fixes to sl28 board
configs: ls1028a: Fix bootefi issue on Layerscape ls1028ardb platform 2024-12-15T01:49:16+00:00 Wei Ming Chen jj251510319013@gmail.com 2024-10-13T07:24:35+00:00 b4626f3934767e2e40cd56fc4368af835fd94126 Without this patch, there will be error indicating that "Cannot use 64 bit addresses with SDMA", and the booting process will stuck. please see full boot log below U-Boot 2022.04-g18185931 (Sep 11 2024 - 13:15:30 +0800) SoC: LS1028AE Rev1.0 (0x870b0010) Clock Configuration: CPU0(A72):1500 MHz CPU1(A72):1500 MHz Bus: 400 MHz DDR: 1600 MT/s Reset Configuration Word (RCW): 00000000: 3c004010 00000030 00000000 00000000 00000010: 00000000 018f0000 0030c000 00000000 00000020: 020031a0 00002580 00000000 00003296 00000030: 00000000 00000010 00000000 00000000 00000040: 00000000 00000000 00000000 00000000 00000050: 00000000 00000000 00000000 00000000 00000060: 00000000 00000000 200e705a 00000000 00000070: bb580000 00000000 Model: LS1028A RDB Board Board: LS1028AE Rev1.0-RDB, Version: C, boot from SD FPGA: v8 (RDB) SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MHz DRAM: 3.9 GiB DDR 3.9 GiB (DDR4, 32-bit, CL=11, ECC on) Using SERDES1 Protocol: 47960 (0xbb58) PCIe1: pcie@3400000 Root Complex: no link PCIe2: pcie@3500000 Root Complex: x1 gen2 Core: 45 devices, 22 uclasses, devicetree: separate WDT: Started watchdog@c000000 with servicing (60s timeout) WDT: Started watchdog@c010000 with servicing (60s timeout) MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment EEPROM: Invalid ID (ff ff ff ff) In: serial Out: serial Err: serial SEC0: RNG instantiated Net: Warning: enetc-0 (eth0) using random MAC address - d2:9b:a5:37:7b:b5 eth0: enetc-0 Warning: enetc-2 (eth1) using random MAC address - ca:57:11:de:de:cb , eth1: enetc-2, eth2: swp0, eth3: swp1, eth4: swp2, eth5: swp3 Hit any key to stop autoboot: 0 Trying load HDP firmware from SD.. switch to partitions #0, OK mmc0 is current device Device: FSL_SDHC Manufacturer ID: 9f OEM: 5449 Name: SD32G Bus Speed: 50000000 Mode: SD High Speed (50MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 28.9 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes MMC read: dev # 0, block # 18944, count 512 ... 512 blocks read: OK Loading hdp firmware from 0x00000000a0000000 offset 0x0000000000002000 Loading hdp firmware Complete switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... ** Unable to read file / ** Failed to load '/' libfdt fdt_check_header(): FDT_ERR_BADMAGIC Scanning disk mmc@2140000.blk... Scanning disk mmc@2150000.blk... Found 7 disks ERROR: invalid device tree Found EFI removable media binary efi/boot/bootaa64.efi 981992 bytes read in 44 ms (21.3 MiB/s) libfdt fdt_check_header(): FDT_ERR_BADMAGIC WARNING could not find node vivante,gc: FDT_ERR_NOTFOUND. Booting /efi\boot\bootaa64.efi Cannot use 64 bit addresses with SDMA Error reading cluster ** Unable to read file /efi/boot/grubaa64.efi ** Unexpected return from initial read: Device Error, buffersize 29D790 Failed to load image ぀￢ : Device Error start_image() returned Device Error EFI LOAD FAILED: continuing... switch to partitions #0, OK mmc1(part 0) is current device Scanning mmc 1:1... ** Unable to read file / ** Failed to load '/' libfdt fdt_check_header(): FDT_ERR_BADMAGIC BootOrder not defined EFI boot manager: Cannot load any image Scanning mmc 1:2... ** Unable to read file / ** Failed to load '/' libfdt fdt_check_header(): FDT_ERR_BADMAGIC BootOrder not defined EFI boot manager: Cannot load any image starting USB... Bus usb@3100000: Register 200017f NbrPorts 2 Starting the controller USB XHCI 1.00 Bus usb@3110000: Register 200017f NbrPorts 2 Starting the controller USB XHCI 1.00 scanning bus usb@3100000 for devices... 1 USB Device(s) found scanning bus usb@3110000 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Device 0: unknown device Trying load from SD ... switch to partitions #0, OK mmc0 is current device Device: FSL_SDHC Manufacturer ID: 9f OEM: 5449 Name: SD32G Bus Speed: 50000000 Mode: SD High Speed (50MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 28.9 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes MMC read: dev # 0, block # 32768, count 81920 ... 81920 blocks read: OK Wrong Image Format for bootm command ERROR: can't get kernel image! Signed-off-by: Wei Ming Chen <jj251510319013@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 
Without this patch, there will be error indicating that
"Cannot use 64 bit addresses with SDMA", and the booting
process will stuck.

please see full boot log below

U-Boot 2022.04-g18185931 (Sep 11 2024 - 13:15:30 +0800)

SoC:  LS1028AE Rev1.0 (0x870b0010)
Clock Configuration:
       CPU0(A72):1500 MHz  CPU1(A72):1500 MHz
       Bus:      400  MHz  DDR:      1600 MT/s
Reset Configuration Word (RCW):
       00000000: 3c004010 00000030 00000000 00000000
       00000010: 00000000 018f0000 0030c000 00000000
       00000020: 020031a0 00002580 00000000 00003296
       00000030: 00000000 00000010 00000000 00000000
       00000040: 00000000 00000000 00000000 00000000
       00000050: 00000000 00000000 00000000 00000000
       00000060: 00000000 00000000 200e705a 00000000
       00000070: bb580000 00000000
Model: LS1028A RDB Board
Board: LS1028AE Rev1.0-RDB, Version: C, boot from SD
FPGA: v8 (RDB)
SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MHz
DRAM:  3.9 GiB
DDR    3.9 GiB (DDR4, 32-bit, CL=11, ECC on)
Using SERDES1 Protocol: 47960 (0xbb58)
PCIe1: pcie@3400000 Root Complex: no link
PCIe2: pcie@3500000 Root Complex: x1 gen2
Core:  45 devices, 22 uclasses, devicetree: separate
WDT:   Started watchdog@c000000 with servicing (60s timeout)
WDT:   Started watchdog@c010000 with servicing (60s timeout)
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

EEPROM: Invalid ID (ff ff ff ff)
In:    serial
Out:   serial
Err:   serial
SEC0:  RNG instantiated
Net:
Warning: enetc-0 (eth0) using random MAC address - d2:9b:a5:37:7b:b5
eth0: enetc-0
Warning: enetc-2 (eth1) using random MAC address - ca:57:11:de:de:cb
, eth1: enetc-2, eth2: swp0, eth3: swp1, eth4: swp2, eth5: swp3
Hit any key to stop autoboot:  0
Trying load HDP firmware from SD..
switch to partitions #0, OK
mmc0 is current device
Device: FSL_SDHC
Manufacturer ID: 9f
OEM: 5449
Name: SD32G
Bus Speed: 50000000
Mode: SD High Speed (50MHz)
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 28.9 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes

MMC read: dev # 0, block # 18944, count 512 ... 512 blocks read: OK
Loading hdp firmware from 0x00000000a0000000 offset 0x0000000000002000
Loading hdp firmware Complete
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
** Unable to read file / **
Failed to load '/'
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
Scanning disk mmc@2140000.blk...
Scanning disk mmc@2150000.blk...
Found 7 disks
ERROR: invalid device tree
Found EFI removable media binary efi/boot/bootaa64.efi
981992 bytes read in 44 ms (21.3 MiB/s)
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
WARNING could not find node vivante,gc: FDT_ERR_NOTFOUND.
Booting /efi\boot\bootaa64.efi
Cannot use 64 bit addresses with SDMA
Error reading cluster
** Unable to read file /efi/boot/grubaa64.efi **
Unexpected return from initial read: Device Error, buffersize 29D790
Failed to load image ぀￢ : Device Error
start_image() returned Device Error
EFI LOAD FAILED: continuing...
switch to partitions #0, OK
mmc1(part 0) is current device
Scanning mmc 1:1...
** Unable to read file / **
Failed to load '/'
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
BootOrder not defined
EFI boot manager: Cannot load any image
Scanning mmc 1:2...
** Unable to read file / **
Failed to load '/'
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
BootOrder not defined
EFI boot manager: Cannot load any image
starting USB...
Bus usb@3100000: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
Bus usb@3110000: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus usb@3100000 for devices... 1 USB Device(s) found
scanning bus usb@3110000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Device 0: unknown device
Trying load from SD ...
switch to partitions #0, OK
mmc0 is current device
Device: FSL_SDHC
Manufacturer ID: 9f
OEM: 5449
Name: SD32G
Bus Speed: 50000000
Mode: SD High Speed (50MHz)
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 28.9 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes

MMC read: dev # 0, block # 32768, count 81920 ... 81920 blocks read: OK
Wrong Image Format for bootm command
ERROR: can't get kernel image!

Signed-off-by: Wei Ming Chen <jj251510319013@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
efi_loader: Fix typos in enum efi_allocate_type 2024-12-15T01:07:23+00:00 Simon Glass sjg@chromium.org 2024-12-01T15:24:21+00:00 920e165ebfc432b7fb91f2c5a10804480e3a9687 Fix 'indicatged' and 'adress' typos. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com> 
Fix 'indicatged' and 'adress' typos.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
pinctrl: rzg2l: Support Ethernet TXC output enable 2024-12-08T22:06:52+00:00 Paul Barker paul.barker.ct@bp.renesas.com 2024-11-20T09:48:29+00:00 bba516a772853595901a7359209bc588d2bffda0 On the RZ/G2L SoC family, the direction of the Ethernet TXC/TX_CLK signal is selectable to support an Ethernet PHY operating in either MII or RGMII mode. By default, the signal is configured as an input and MII mode is supported. The ETH_MODE register can be modified to configure this signal as an output to support RGMII mode. As this signal is be default an input, and can optionally be switched to an output, it maps neatly onto an `output-enable` property in the device tree. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> 
On the RZ/G2L SoC family, the direction of the Ethernet TXC/TX_CLK
signal is selectable to support an Ethernet PHY operating in either MII
or RGMII mode. By default, the signal is configured as an input and MII
mode is supported. The ETH_MODE register can be modified to configure
this signal as an output to support RGMII mode.

As this signal is be default an input, and can optionally be switched to
an output, it maps neatly onto an `output-enable` property in the device
tree.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
pinctrl: rzg2l: Support 2.5V PVDD for Ethernet interfaces 2024-12-08T22:06:52+00:00 Paul Barker paul.barker.ct@bp.renesas.com 2024-11-20T09:48:28+00:00 215663f5e47db92c6c13107e877a943c3e70aa2a The Ethenet interfaces on the Renesas RZ/G2L SoC family can operate at multiple power supply voltages: 3.3V (default value), 2.5V and 1.8V. rzg2l_pinconf_set() is extended to support the 2.5V setting, with a check to ensure this is only used on Ethernet interfaces as it is not supported on the SD & QSPI interfaces. While we're modifying rzg2l_pinconf_set(), drop the unnecessary default value for pwr_reg as it is set in every branch of the following if condition. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> 
The Ethenet interfaces on the Renesas RZ/G2L SoC family can operate at
multiple power supply voltages: 3.3V (default value), 2.5V and 1.8V.

rzg2l_pinconf_set() is extended to support the 2.5V setting, with a
check to ensure this is only used on Ethernet interfaces as it is not
supported on the SD & QSPI interfaces.

While we're modifying rzg2l_pinconf_set(), drop the unnecessary default
value for pwr_reg as it is set in every branch of the following if
condition.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
net: disable MBEDTLS in SPL 2024-12-06T23:47:23+00:00 Heinrich Schuchardt heinrich.schuchardt@canonical.com 2024-12-06T11:37:09+00:00 c7401fc1d99b88a3a3d16519f07974473908cd46 Building SPL fails with MBEDTLS enabled. Currently we don't need it there. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> 
Building SPL fails with MBEDTLS enabled.
Currently we don't need it there.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Revert "global_data: Drop spl_handoff" 2024-12-02T13:40:39+00:00 Simon Glass sjg@chromium.org 2024-12-01T14:42:35+00:00 924a5e4e41e99cefabc465c82ffd91374d38a1e7 This breaks chromebook_coral which says: Video: No video mode configured in FSP! This reverts commit 2e9313179a846b581c0fc3f6a49e19f3d343efa8. Signed-off-by: Simon Glass <sjg@chromium.org> 
This breaks chromebook_coral which says:

   Video: No video mode configured in FSP!

This reverts commit 2e9313179a846b581c0fc3f6a49e19f3d343efa8.

Signed-off-by: Simon Glass <sjg@chromium.org>
ARM: imx: Perform plain boot in altbootcmd on Data Modul i.MX8M Mini/Plus eDM SBC 2024-11-29T12:19:00+00:00 Marek Vasut marex@denx.de 2024-11-29T00:13:55+00:00 ec3e5fa55d8232f3e5938a2702e20fa432600adf The current A/B switching preparatory altbootcmd is confusing to users, replace it with plain 'run bootcmd' which can be replaced by proper A/B switching altbootcmd when the matching updater is added on top of the platform. By default, keep the boot counter incrementing, but do not do any A/B partition switching. Signed-off-by: Marek Vasut <marex@denx.de> 
The current A/B switching preparatory altbootcmd is confusing
to users, replace it with plain 'run bootcmd' which can be
replaced by proper A/B switching altbootcmd when the matching
updater is added on top of the platform. By default, keep the
boot counter incrementing, but do not do any A/B partition
switching.

Signed-off-by: Marek Vasut <marex@denx.de>
arm: mvebu: Add Allied Telesis x250 board 2024-11-26T12:20:03+00:00 Chris Packham judge.packham@gmail.com 2024-11-25T19:55:53+00:00 7446e29db54818324859126739c3477a15d25c36 The x250 and SE250 are series of 10G L2+ switches from Allied Telesis. There are a number of them in the range but as far as U-Boot is concerned all the CPU block components are the same so there's only one board defined. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> 
The x250 and SE250 are series of 10G L2+ switches from Allied Telesis.
There are a number of them in the range but as far as U-Boot is
concerned all the CPU block components are the same so there's only one
board defined.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
arm: mvebu: x530: Remove dead comments 2024-11-26T12:20:03+00:00 Chris Packham judge.packham@gmail.com 2024-11-22T00:30:19+00:00 1b46176532a514a3f38db5e401ecfde744344c7f As things have been moved to Kconfig there are a number of dead comments left over in x530.h. Remove them. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> 
As things have been moved to Kconfig there are a number of dead comments
left over in x530.h. Remove them.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>