u-boot.git/nand_spl, branch v1.3.3

ppc4xx: Individual handling of ddr2_fixed.c for canyonlands_nand build

2008-05-14T10:26:16Z

Canyonlands has a file ddr2_fixed.c which needs special treatment when building in separate directory. It has to be linked to build directory otherwise it is not seen. Signed-off-by: Stefan Roese

ppc4xx: Adapt Canyonlands fixed DDR2 setup to new DIMM module

2008-04-30T12:51:36Z

This patch changes the Canyonlands/Glacier fixed DDR2 controller setup used for NAND booting to match the values needed for the new 512MB DIMM modules shipped with the productions boards: Crucial: CT6464AC667.8FB Signed-off-by: Stefan Roese

Merge branch 'master' of git://www.denx.de/git/u-boot-nand-flash

2008-04-25T09:10:17Z

ppc4xx: Change Canyonlands to support booting from 2k page NAND devices

2008-04-18T14:30:49Z

Signed-off-by: Stefan Roese

ppc4xx: Adjust Canyonlands fixed DDR2 setup (NAND booting) to 512MB SODIMM

2008-04-18T14:30:39Z

Signed-off-by: Stefan Roese

nand_spl: Update nand_spl to support 2k page size NAND devices

2008-04-18T14:12:46Z

This patch adds support for booting from 2k page sized NAND device (e.g. Micron 29F2G08AAC). Tested on AMCC Canyonlands. Signed-off-by: Stefan Roese

ppc4xx: Add Canyonlands NAND booting support

2008-03-15T06:28:05Z

460EX doesn't support a fixed bootstrap option to boot from 512 byte page NAND devices. The only bootstrap option for NAND booting is option F for 2k page devices. So to boot from a 512 bype page device, the I2C bootstrap EEPROM needs to be programmed accordingly. This patch adds basic NAND booting support for the AMCC Canyonlands aval board and also adds support to the "bootstrap" command, to enable NAND booting I2C setting. Tested with 512 byte page NAND device (32MByte) on Canyonlands. Signed-off-by: Stefan Roese

Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections

2008-01-12T19:31:39Z

With recent toolchain versions, some boards would not build because or errors like this one (here for ocotea board when building with ELDK 4.2 beta): ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab] For many boards, the .bss section is big enough that it wraps around at the end of the address space (0xFFFFFFFF), so the problem will not be visible unless you use a 64 bit tool chain for development. On some boards however, changes to the code size (due to different optimizations) we bail out with section overlaps like above. The fix is to add the NOLOAD attribute to the .bss and .sbss sections, telling the linker that .bss does not consume any space in the image. Signed-off-by: Wolfgang Denk

fix various comments

2008-01-09T20:50:47Z

Signed-off-by: Marcel Ziswiler

fix comments with new drivers organization

2008-01-09T20:48:49Z

Signed-off-by: Marcel Ziswiler