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<title>u-boot.git/nand_spl, branch v2009.08-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/nand_spl?h=v2009.08-rc2</id>
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<updated>2009-07-30T05:22:18Z</updated>
<entry>
<title>ppc4xx: Canyonlands-NAND-boot: Support 2 Crucial 512MByte SODIMM's</title>
<updated>2009-07-30T05:22:18Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-07-28T13:12:04Z</published>
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<id>urn:sha1:82a7edc7ea8f5fe55fed4ff7e127469569e539c4</id>
<content type='text'>
Some Canyonlands boards are equipped with different SODIMM's. This is no
problem with the "normal" NOR booting Canyonlands U-Boot, since it
automatically detects the SODIMM's via SPD data and correctly configures
them. But the NAND booting version is different. Here we only have 4k
of image size to completely setup the hardware, including DDR2 setup.
So we need to use a fixed DDR2 setup here. This doesn't work for different
SODIMM's right now.

Currently only this Crucial SODIMM is support:
CT6464AC667.8FB (dual ranked)

Now some boards are shipped with this SODIMM:
CT6464AC667.4FE (single ranked)

This patch now supports both SODIMM's by configuring first for the dual
ranked DIMM. A quick shows, if this module is really installed. If this test
fails, the DDR2 controller is re-configured for the single
ranked SODIMM.

Tested with those SODIMM's:

CT6464AC667.8FB (dual ranked)
CT6464AC667.4FE (single ranked)

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>nand/ppc4xx: Move PPC4xx NAND driver to common NAND driver directory</title>
<updated>2009-07-16T22:52:02Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-07-16T13:12:48Z</published>
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<id>urn:sha1:12582ac771b0bf3852817c3bfa4be326522a0665</id>
<content type='text'>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Scott Wood &lt;scottwood@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>nand_spl: Fix cmd_ctrl usage in nand_boot.c.</title>
<updated>2009-07-07T22:58:10Z</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2009-06-24T22:23:49Z</published>
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<id>urn:sha1:1dac3a51875967f32641bbc0d26dc382ef02330a</id>
<content type='text'>
When adding large page NAND support to this file, I had a misunderstanding
about the exact semantics of NAND_CTRL_CHANGE (which isn't documented
anywhere I can find) -- it is apparently just a hint to drivers,
which aren't required to preserve the old value for subsequent
non-"change" invocations.

This change makes nand_boot.c no longer assume this.  Note that this
happened to work by chance with some NAND drivers, which don't preserve
the value, but treat 0 equivalently to NAND_CTRL_ALE.

I don't have hardware to test this, so any testing is appreciated.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>nand_spl: read environment early, when booting from NAND using nand_spl</title>
<updated>2009-07-07T22:58:07Z</updated>
<author>
<name>Guennadi Liakhovetski</name>
<email>lg@denx.de</email>
</author>
<published>2009-05-18T14:07:22Z</published>
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<id>urn:sha1:b74ab737369bbbe66c15cbe6c0d0b6a351b00c96</id>
<content type='text'>
Currently, when booting from NAND using nand_spl, in the beginning the default
environment is used until later in boot process the dynamic environment is read
out. This way environment variables that must be interpreted early, like the
baudrate or "silent", cannot be modified dynamically and remain at their
default values. Fix this problem by reading out main and redundand (if used)
copies of the environment in the nand_spl code.

Signed-off-by: Guennadi Liakhovetski &lt;lg@denx.de&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>MX31: Add NAND SPL boot support to i.MX31 PDK board.</title>
<updated>2009-07-06T19:53:18Z</updated>
<author>
<name>Magnus Lilja</name>
<email>lilja.magnus@gmail.com</email>
</author>
<published>2009-07-04T08:31:24Z</published>
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<id>urn:sha1:d08e5ca301b69ab77ecdd34e2b06aee30d6057d1</id>
<content type='text'>
Signed-off-by: Magnus Lilja &lt;lilja.magnus@gmail.com&gt;
</content>
</entry>
<entry>
<title>MX31: Add NAND SPL for i.MX31.</title>
<updated>2009-06-21T14:18:12Z</updated>
<author>
<name>Magnus Lilja</name>
<email>lilja.magnus@gmail.com</email>
</author>
<published>2009-06-13T18:50:01Z</published>
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<id>urn:sha1:40c642bc19b9fa2906e3172487a522fee456340b</id>
<content type='text'>
This patch adds the NAND SPL framework needed to boot i.MX31 boards
from NAND.

It has been tested on a i.MX31 PDK board with large page NAND. Small
page NANDs should work as well, but this has not been tested.

Note: The i.MX31 NFC uses a non-standard layout for large page NANDs,
whether this is compatible with a particular setup depends on how
the NAND device is programmed by the flash programmer (e.g. JTAG
debugger).

The patch is based on the work by Maxim Artamonov.

Signed-off-by: Maxim Artamonov &lt;scn1874@yandex.ru&gt;
Signed-off-by: Magnus Lilja &lt;lilja.magnus@gmail.com&gt;
</content>
</entry>
<entry>
<title>Fix e-mail address of Gary Jennejohn.</title>
<updated>2009-05-15T20:11:59Z</updated>
<author>
<name>Detlev Zundel</name>
<email>dzu@denx.de</email>
</author>
<published>2009-05-13T08:54:10Z</published>
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<id>urn:sha1:792a09eb9d5d8c4f74b7e9f2e887316d511a4e80</id>
<content type='text'>
Signed-off-by: Detlev Zundel &lt;dzu@denx.de&gt;
</content>
</entry>
<entry>
<title>Fix all linker script to handle all rodata sections</title>
<updated>2009-03-20T21:39:12Z</updated>
<author>
<name>Trent Piepho</name>
<email>xyzzy@speakeasy.org</email>
</author>
<published>2009-02-18T23:22:05Z</published>
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<id>urn:sha1:f62fb99941c625605aa16a0097b396a5c16d2c88</id>
<content type='text'>
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho &lt;xyzzy@speakeasy.org&gt;
</content>
</entry>
<entry>
<title>SIMPC8313 board: fix out of tree building.</title>
<updated>2009-03-09T09:51:39Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2009-03-09T09:51:39Z</published>
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<id>urn:sha1:4b00d1aa82b6af9b4e628a5729a12086e44558b3</id>
<content type='text'>
Fix typo in makefile which broke out of tree builds.

Also use expolicit "rm" instead of "ln -sf" which is known to be
unreliable.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-nand-flash</title>
<updated>2009-01-28T22:14:22Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2009-01-28T22:14:22Z</published>
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<content type='text'>
</content>
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