u-boot.git/net/eth.c, branch LABEL_2006_04_18_1106

Merge with /home/sr/git/u-boot

2005-12-01T00:38:13+00:00

Fix miiphy global data initialization (problem on 4xx boards when no

2005-11-30T17:06:04+00:00

ethaddr is assigned). Initialization moved from miiphy_register() to
eth_initialize().

Based on initial patch for 4xx platform by Matthias Fuchs.

Add support for TQM8541/8555 boards, TQM85xx support reworked:

2005-11-30T12:06:40+00:00

- Support for TQM8541/8555 boards added.
- Complete rework of TQM8540/8560 support.
- Common TQM85xx code now supports all current TQM85xx platforms
  (TQM8540/8541/8555/8560).
- DDR SDRAM size detection added.
- CAS latency default values can be overwritten by setting "serial#"
  to e.g. "ABC0001 casl=25" -> CAS latency 2.5 will be used.
  If problems are detected with this non default CAS latency,
  the defualt values will be used instead.
- FLASH size detection added.
- Moved FCC ethernet driver initialization behind TSEC driver init
  -> TSEC is first device.

Patch by Stefan Roese, 30 Nov 2005

Add support for multiple PHYs.

2005-10-28T20:30:33+00:00

Cleanup for GCC-4.x

2005-10-13T14:45:02+00:00

Add support for AP1000 board.

2005-10-08T23:04:33+00:00

Patch by James MacAulay, 07 Oct 2005

Fix typo in eth.c

2005-09-25T15:05:57+00:00

Patch by Ara Avanesyan, 24 Feb 2005

Merged 405gp_enet.c and 440gx_enet.c to generic 4xx_enet.c

2005-08-16T16:18:00+00:00

now handling all 4xx cpu's.
Patch by Stefan Roese, 16 Aug 2005

* Patch by Eran Liberty

2005-07-28T15:08:46+00:00

  Add support for the Freescale MPC8349ADS board.

* Patch by Jon Loeliger, 2005-05-05

2005-07-25T19:05:07+00:00

  Implemented support for MPC8548CDS board.
  Added DDR II support based on SPD values for MPC85xx boards.
  This roll-up patch also includes bugfies for the previously
  published patches:
    DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O