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<title>u-boot.git/onenand_ipl, branch v2009.08</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/onenand_ipl?h=v2009.08</id>
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<updated>2009-08-21T21:13:34Z</updated>
<entry>
<title>Fix all linker scripts for older binutils versions (pre-2.16)</title>
<updated>2009-08-21T21:13:34Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2009-08-17T12:00:53Z</published>
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<id>urn:sha1:1aada9cd643567d351667138851e9231ccfa245a</id>
<content type='text'>
Commit f62fb99941c6 fixed handling of all rodata sections by using a
wildcard combined with calls to ld's builtin functions SORT_BY_ALIGNMENT()
and SORT_BY_NAME().  Unfortunately these functions were only
introduced with biunutils version 2.16, so the modification broke
building with all tool chains using older binutils.

This patch makes it work again.  This is done by omitting the use of
these functions for such old tool chains.  This will result in
slightly larger target binaries, as the rodata sections are no longer
in optimal order alignment-wise which reauls in unused gaps, but the
effect was found to be insignificant - especially compared to the fact
that you cannot build U-Boot at all in the current state.

As ld seems to have no support for conditionals we run the linker
script through the C preprocessor which can be easily used to remove
the unwanted function calls.

Note that the C preprocessor must be run with the "-ansi" (or a
"-std=") option to make sure all the system-specific predefined
macros outside the reserved namespace are suppressed. Otherise, cpp
might for example substitute "powerpc" to "1", thus corrupting for
example "OUTPUT_ARCH(powerpc)" etc.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Mike Frysinger &lt;vapier@gentoo.org&gt;
</content>
</entry>
<entry>
<title>ARM1136: Introduce CONFIG_PRELOADER macro.</title>
<updated>2009-06-21T14:18:12Z</updated>
<author>
<name>Magnus Lilja</name>
<email>lilja.magnus@gmail.com</email>
</author>
<published>2009-06-13T18:50:00Z</published>
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<id>urn:sha1:df81238b3e27a791da996a9208402ac8f40b9862</id>
<content type='text'>
Currently CONFIG_ONENAND_IPL is used in a number of #ifdef's
in start.S. In preparation for adding support for NAND SPL
the macro CONFIG_PRELOADER is introducted and replaces the
CONFIG_ONENAND_IPL in start.S.

Signed-off-by: Magnus Lilja &lt;lilja.magnus@gmail.com&gt;
</content>
</entry>
<entry>
<title>apollon: Fix a OBJCFLAGS typo</title>
<updated>2009-06-09T23:29:28Z</updated>
<author>
<name>Shinya Kuribayashi</name>
<email>skuribay@ruby.dti.ne.jp</email>
</author>
<published>2009-06-07T12:45:16Z</published>
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<id>urn:sha1:aa446a591aca46ef2b53cc6598ea8091feb45444</id>
<content type='text'>
Signed-off-by: Shinya Kuribayashi &lt;skuribay@pobox.com&gt;
</content>
</entry>
<entry>
<title>Fix OneNAND ipl to read CONFIG_SYS_MONITOR_LEN</title>
<updated>2009-04-03T20:27:25Z</updated>
<author>
<name>apgmoorthy</name>
<email>moorthy.apg@samsung.com</email>
</author>
<published>2009-03-27T09:15:23Z</published>
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<id>urn:sha1:69bcabb51686fdd133cb1848c0d3b0a4fc6ca5cf</id>
<content type='text'>
Currently OneNAND initial program loader (ipl) reads only block 0 ie 128KB.
However, u-boot image for apollon board is 195KB making the board
unbootable with OneNAND.

Fix ipl to read CONFIG_SYS_MONITOR_LEN.
CONFIG_SYS_MONITOR_LEN macro holds the U-Boot image size.

Signed-off-by: Rohit Hagargundgi &lt;h.rohit@samsung.com&gt;
Signed-off-by: Gangheyamoorthy   &lt;moorthy.apg@samsung.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>Reduce OneNAND IPL common code</title>
<updated>2009-03-23T22:06:55Z</updated>
<author>
<name>Kyungmin Park</name>
<email>kmpark@infradead.org</email>
</author>
<published>2009-03-03T00:05:53Z</published>
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<id>urn:sha1:196c74311f394c6eb08bd9ab07a35671299b9851</id>
<content type='text'>
OneNAND IPL has common codes for RAM init, load data, and jump to 2nd
bootloader, but it's common code used about 300~400 bytes. So board
specific codes, such as lowlevel_init, can't has enough code. It make
a difficult to implement OneNAND IPL.

his patch make this common code as small as possible. and give
lowlevel_init can have more codes.

Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>Fix all linker script to handle all rodata sections</title>
<updated>2009-03-20T21:39:12Z</updated>
<author>
<name>Trent Piepho</name>
<email>xyzzy@speakeasy.org</email>
</author>
<published>2009-02-18T23:22:05Z</published>
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<id>urn:sha1:f62fb99941c625605aa16a0097b396a5c16d2c88</id>
<content type='text'>
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho &lt;xyzzy@speakeasy.org&gt;
</content>
</entry>
<entry>
<title>Align end of bss by 4 bytes</title>
<updated>2008-11-18T22:13:16Z</updated>
<author>
<name>Selvamuthukumar</name>
<email>selva.muthukumar@e-coninfotech.com</email>
</author>
<published>2008-10-16T17:24:03Z</published>
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<id>urn:sha1:9b827cf1720acda2473afa516956eab6f7cca9a1</id>
<content type='text'>
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.

Signed-off-by: Selvamuthukumar &lt;selva.muthukumar@e-coninfotech.com&gt;
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>rename CFG_ macros to CONFIG_SYS</title>
<updated>2008-10-18T19:54:03Z</updated>
<author>
<name>Jean-Christophe PLAGNIOL-VILLARD</name>
<email>plagnioj@jcrosoft.com</email>
</author>
<published>2008-10-16T13:01:15Z</published>
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<id>urn:sha1:6d0f6bcf337c5261c08fabe12982178c2c489d76</id>
<content type='text'>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</content>
</entry>
<entry>
<title>Fix merge problems</title>
<updated>2008-08-06T12:05:38Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2008-08-06T12:05:38Z</published>
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<id>urn:sha1:f2302d4430e7f3f48308d6a585320fe96af8afbd</id>
<content type='text'>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>Add Flex-OneNAND booting support</title>
<updated>2008-03-25T23:05:32Z</updated>
<author>
<name>Kyungmin Park</name>
<email>kmpark@infradead.org</email>
</author>
<published>2008-03-16T23:54:06Z</published>
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<id>urn:sha1:1bb707c39a0833e91d9f797dd862aaaaf4af264d</id>
<content type='text'>
Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array
using a NOR Flash interface. This on-chip integration enables system designers
to reduce external system logic and use high-density NAND Flash
in applications that would otherwise have to use more NOR components.

Flex-OneNAND enables users to configure to partition it into SLC and MLC areas
in more flexible way. While MLC area of Flex-OneNAND can be used to store data
that require low reliability and high density, SLC area of Flex-OneNAND
to store data that need high reliability and high performance. Flex-OneNAND
can let users take advantage of storing these two different types of data
into one chip, which is making Flex-OneNAND more cost- and space-effective.

Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
</content>
</entry>
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