u-boot.git/post/cpu/ppc4xx/cache.c, branch v2009.06 Unnamed repository; edit this file 'description' to name the repository. rename CFG_ macros to CONFIG_SYS 2008-10-18T19:54:03+00:00 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com 2008-10-16T13:01:15+00:00 6d0f6bcf337c5261c08fabe12982178c2c489d76 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
POST: preparations for moving CONFIG_POST to Makefiles 2008-04-22T12:38:38+00:00 Yuri Tikhonov yur@emcraft.com 2008-03-31T08:49:34+00:00 0a51e9248e2d27e0a02ef1e740c576ce90a39ee1 Remove CONFIG_POST ifdefs from the post/ source files. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de> 
Remove CONFIG_POST ifdefs from the post/ source files.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
ppc4xx: program_tlb now uses 64bit physical addess 2008-03-15T06:28:03+00:00 Stefan Roese sr@denx.de 2008-02-19T21:01:57+00:00 84a999b6cdd0b02dc7de2cacc306eaa84afe2b46 This patch changes the physical addess parameter from 32bit to 64bit. This is needed for 36bit 4xx platforms to access areas located beyond the 4GB border, like SoC peripherals (EBC etc.). Signed-off-by: Stefan Roese <sr@denx.de> 
This patch changes the physical addess parameter from 32bit to 64bit.
This is needed for 36bit 4xx platforms to access areas located
beyond the 4GB border, like SoC peripherals (EBC etc.).

Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Fix compilation problem in 405 cache POST test 2007-12-27T18:35:35+00:00 Stefan Roese sr@denx.de 2007-12-26T19:20:19+00:00 2e583d6c81034f80a267b89fa55498ae063ccef1 Signed-off-by: Stefan Roese <sr@denx.de> 
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Fix problem in 44x cache POST routine 2007-12-27T18:35:34+00:00 Stefan Roese sr@denx.de 2007-12-22T11:18:26+00:00 d91722102cf63f77a0148ed3f3d54a26d87575e9 As repoted by Larry Johnson, running "diag run cache" caused a crash in U-Boot. This problem was introduced by a patch that removed the TLB entry for the cache test after the test has completed. Since this TLB was only setup once, a 2nd attempt to run this cache test failed with a crash. Now this TLB entry is created every time the routine is called. Signed-off-by: Stefan Roese <sr@denx.de> 
As repoted by Larry Johnson, running "diag run cache" caused a crash
in U-Boot. This problem was introduced by a patch that removed the
TLB entry for the cache test after the test has completed. Since this
TLB was only setup once, a 2nd attempt to run this cache test
failed with a crash. Now this TLB entry is created every time the
routine is called.

Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Remove temporary TLB entry in POST cache test only for 440 2007-10-31T20:21:47+00:00 Stefan Roese sr@denx.de 2007-10-31T19:45:53+00:00 a2685904061b35a17583d65fe47cdc2686a69eaa Signed-off-by: Stefan Roese <sr@denx.de> 
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Remove compiler warning from previous commit 2007-10-31T20:21:46+00:00 Stefan Roese sr@denx.de 2007-10-23T16:03:12+00:00 06713773da4ac3d390c63d82641eb553224b27c2 Signed-off-by: Stefan Roese <sr@denx.de> 
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Remove temporary TLB entry in POST cache test 2007-10-31T20:21:46+00:00 Stefan Roese sr@denx.de 2007-10-23T12:40:30+00:00 6fa397df67c0f269e4528bf181a6e8c88f9723f9 Signed-off-by: Stefan Roese <sr@denx.de> 
Signed-off-by: Stefan Roese <sr@denx.de>
POST: Add ppc405 support to cache and UART POST 2007-08-14T12:39:44+00:00 Stefan Roese sr@denx.de 2007-08-14T12:39:44+00:00 eb2b4010ae426245172988804ee8d9193fb41038 Signed-off-by: Stefan Roese <sr@denx.de> 
Signed-off-by: Stefan Roese <sr@denx.de>
Merged POST framework with the current TOT. 2007-07-05T06:17:37+00:00 Sergei Poselenov sposelenov@emcraft.com 2007-07-05T06:17:37+00:00 b44896215a09c60fa40cae906f7ed207bbc2c492 Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> 
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>