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<title>u-boot.git/test/dm/Makefile, branch v2017.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>dm: test: Add tests for the generic PHY uclass</title>
<updated>2017-05-09T18:14:16+00:00</updated>
<author>
<name>Jean-Jacques Hiblot</name>
<email>jjhiblot@ti.com</email>
</author>
<published>2017-04-24T09:51:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=86322f5982206f431ee4678a74182859c249aac4'/>
<id>86322f5982206f431ee4678a74182859c249aac4</id>
<content type='text'>
Those tests check:
- the ability for a phy-user to get a phy based on its name or its index
- the ability of a phy device (provider) to manage multiple ports
- the ability to perform operations on the phy (init,deinit,on,off)
- the behavior of the uclass when optional operations are not implemented

Signed-off-by: Jean-Jacques Hiblot &lt;jjhiblot@ti.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Those tests check:
- the ability for a phy-user to get a phy based on its name or its index
- the ability of a phy device (provider) to manage multiple ports
- the ability to perform operations on the phy (init,deinit,on,off)
- the behavior of the uclass when optional operations are not implemented

Signed-off-by: Jean-Jacques Hiblot &lt;jjhiblot@ti.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>dm: Simple Watchdog uclass</title>
<updated>2017-05-08T15:57:30+00:00</updated>
<author>
<name>maxims@google.com</name>
<email>maxims@google.com</email>
</author>
<published>2017-04-17T19:00:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0753bc2d30d7ca4a0ea4ef7f97083961c3a9d0e0'/>
<id>0753bc2d30d7ca4a0ea4ef7f97083961c3a9d0e0</id>
<content type='text'>
This is a simple uclass for Watchdog Timers. It has four operations:
start, restart, reset, stop. Drivers must implement start, restart and
stop operations, while implementing reset is optional: It's default
implementation expires watchdog timer in one clock tick.

Signed-off-by: Maxim Sloyko &lt;maxims@google.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
This is a simple uclass for Watchdog Timers. It has four operations:
start, restart, reset, stop. Drivers must implement start, restart and
stop operations, while implementing reset is optional: It's default
implementation expires watchdog timer in one clock tick.

Signed-off-by: Maxim Sloyko &lt;maxims@google.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: sandbox: pwm: Add a basic pwm test</title>
<updated>2017-04-27T20:49:02+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-04-17T03:01:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=43b41566f72c3ff1074fe686f37227ebe33e11f9'/>
<id>43b41566f72c3ff1074fe686f37227ebe33e11f9</id>
<content type='text'>
Unfortunately a test for the PWM uclass was not included when it was
submitted. This was noticed when trying to add more functionality:

   http://patchwork.ozlabs.org/patch/748172/

Add a simple test to get us started.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Unfortunately a test for the PWM uclass was not included when it was
submitted. This was noticed when trying to add more functionality:

   http://patchwork.ozlabs.org/patch/748172/

Add a simple test to get us started.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add a power domain framework/uclass</title>
<updated>2016-07-27T22:29:56+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-07-13T19:45:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=61f5ddcb7a997f7b7bca3680cd6f67e60e616841'/>
<id>61f5ddcb7a997f7b7bca3680cd6f67e60e616841</id>
<content type='text'>
Many SoCs allow power to be applied to or removed from portions of the SoC
(power domains). This may be used to save power. This API provides the
means to control such power management hardware.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Many SoCs allow power to be applied to or removed from portions of the SoC
(power domains). This may be used to save power. This API provides the
means to control such power management hardware.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>reset: implement a reset test</title>
<updated>2016-06-19T23:05:55+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-06-17T15:43:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4581b717b1bf0fb04e7d9fcaf3d4c23d357154ac'/>
<id>4581b717b1bf0fb04e7d9fcaf3d4c23d357154ac</id>
<content type='text'>
This adds a sandbox reset implementation (provider), a test client
device, instantiates them both from Sandbox's DT, and adds a DM test
that excercises everything.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This adds a sandbox reset implementation (provider), a test client
device, instantiates them both from Sandbox's DT, and adds a DM test
that excercises everything.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mailbox: implement a sandbox test</title>
<updated>2016-05-27T02:48:31+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-05-16T23:41:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8961b524240f40ac2fefcdee0818af10899832f2'/>
<id>8961b524240f40ac2fefcdee0818af10899832f2</id>
<content type='text'>
This adds a sandbox mailbox implementation (provider), a test client
device, instantiates them both from Sandbox's DT, and adds a DM test
that excercises everything.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt; # v1
</content>
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<pre>
This adds a sandbox mailbox implementation (provider), a test client
device, instantiates them both from Sandbox's DT, and adds a DM test
that excercises everything.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt; # v1
</pre>
</div>
</content>
</entry>
<entry>
<title>Rename reset to sysreset</title>
<updated>2016-05-27T02:48:31+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-05-12T18:03:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=11636258981a083957c19f3979796fde5e7e8080'/>
<id>11636258981a083957c19f3979796fde5e7e8080</id>
<content type='text'>
The current reset API implements a method to reset the entire system.
In the near future, I'd like to introduce code that implements the device
tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
This controls resets to individual HW blocks or external chips with reset
signals. It doesn't make sense to merge the two APIs into one since they
have different semantic purposes. Resolve the naming conflict by renaming
the existing reset API to sysreset instead, so the new reset API can be
called just reset.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
The current reset API implements a method to reset the entire system.
In the near future, I'd like to introduce code that implements the device
tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
This controls resets to individual HW blocks or external chips with reset
signals. It doesn't make sense to merge the two APIs into one since they
have different semantic purposes. Resolve the naming conflict by renaming
the existing reset API to sysreset instead, so the new reset API can be
called just reset.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spmi: Add sandbox test driver</title>
<updated>2016-04-01T21:18:12+00:00</updated>
<author>
<name>Mateusz Kulikowski</name>
<email>mateusz.kulikowski@gmail.com</email>
</author>
<published>2016-03-31T21:12:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d33776e43dc8471ab03920dda77b00333a8ddd3e'/>
<id>d33776e43dc8471ab03920dda77b00333a8ddd3e</id>
<content type='text'>
This patch adds emulated spmi bus controller with part of
pm8916 pmic on it to sandbox and tests validating SPMI uclass.

Signed-off-by: Mateusz Kulikowski &lt;mateusz.kulikowski@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This patch adds emulated spmi bus controller with part of
pm8916 pmic on it to sandbox and tests validating SPMI uclass.

Signed-off-by: Mateusz Kulikowski &lt;mateusz.kulikowski@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: blk: Add tests for block devices</title>
<updated>2016-03-18T03:27:39+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-03-13T14:22:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e4fb863f6dec0002069d57422ebe3ce3af69a273'/>
<id>e4fb863f6dec0002069d57422ebe3ce3af69a273</id>
<content type='text'>
Add some tests to check that block devices work as expected.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
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<pre>
Add some tests to check that block devices work as expected.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: Re-enable the SPI flash tests</title>
<updated>2016-02-26T15:53:10+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-02-24T16:14:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f8025b58f834c1f25e60b9f4c8e7719cb228a5a1'/>
<id>f8025b58f834c1f25e60b9f4c8e7719cb228a5a1</id>
<content type='text'>
These are working correctly again, so re-enable them.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagan Teki &lt;jteki@openedev.com&gt;
Tested-by: Jagan Teki &lt;jteki@openedev.com&gt;
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<pre>
These are working correctly again, so re-enable them.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagan Teki &lt;jteki@openedev.com&gt;
Tested-by: Jagan Teki &lt;jteki@openedev.com&gt;
</pre>
</div>
</content>
</entry>
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