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<title>u-boot.git/tools/Makefile, branch v2016.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>rockchip: Enable generation of SPI images</title>
<updated>2016-01-08T14:59:00+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-12-29T12:22:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9b03701a10b9377ebcd0bf1d9f8cd980b2ee607a'/>
<id>9b03701a10b9377ebcd0bf1d9f8cd980b2ee607a</id>
<content type='text'>
This feature was dropped at some point. Restore it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This feature was dropped at some point. Restore it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "rockchip: Add max spl size &amp; spl header configs"</title>
<updated>2015-12-14T00:07:06+00:00</updated>
<author>
<name>Jeffy Chen</name>
<email>jeffy.chen@rock-chips.com</email>
</author>
<published>2015-11-27T04:07:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5cc5b901e6d319af18b8dc59537c503bbd3ca7f0'/>
<id>5cc5b901e6d319af18b8dc59537c503bbd3ca7f0</id>
<content type='text'>
This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e

Signed-off-by: Jeffy Chen &lt;jeffy.chen@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e

Signed-off-by: Jeffy Chen &lt;jeffy.chen@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: Add max spl size &amp; spl header configs</title>
<updated>2015-12-01T15:07:22+00:00</updated>
<author>
<name>Jeffy Chen</name>
<email>jeffy.chen@rock-chips.com</email>
</author>
<published>2015-11-17T06:20:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6ae5860942f4eb053e9b8c7e2673eaa7d648082d'/>
<id>6ae5860942f4eb053e9b8c7e2673eaa7d648082d</id>
<content type='text'>
Our chips may have different max spl size and spl header, so
we need to add configs for that.

Signed-off-by: Jeffy Chen &lt;jeffy.chen@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Dropped CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h,
Added $(if...) to tools/Makefile to fix widespread build breakage
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;

Series-changes: 8
- Drop CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h,
- Add $(if...) to tools/Makefile to fix widespread build breakage
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<pre>
Our chips may have different max spl size and spl header, so
we need to add configs for that.

Signed-off-by: Jeffy Chen &lt;jeffy.chen@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Dropped CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h,
Added $(if...) to tools/Makefile to fix widespread build breakage
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;

Series-changes: 8
- Drop CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h,
- Add $(if...) to tools/Makefile to fix widespread build breakage
</pre>
</div>
</content>
</entry>
<entry>
<title>tools: zynqimage: Add Xilinx Zynq boot header generation to mkimage</title>
<updated>2015-11-19T12:09:21+00:00</updated>
<author>
<name>Nathan Rossi</name>
<email>nathan@nathanrossi.com</email>
</author>
<published>2015-11-17T12:56:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=66eef1e780caf0bb3ecadf78582a29031c6279ce'/>
<id>66eef1e780caf0bb3ecadf78582a29031c6279ce</id>
<content type='text'>
As with other platforms vendors love to create their own boot header
formats. Xilinx is no different and for the Zynq platform/SoC there
exists the "boot.bin" which is read by the platforms bootrom. This
format is described to a useful extent within the Xilinx Zynq TRM.

This implementation adds support for the 'zynqimage' to mkimage. The
implementation only considers the most common boot header which is
un-encrypted and packed directly after the boot header itself (no
XIP, etc.). However this implementation does take into consideration the
other fields of the header for image dumping use cases (vector table and
register initialization).

Signed-off-by: Nathan Rossi &lt;nathan@nathanrossi.com&gt;
Cc: Michal Simek &lt;michal.simek@xilinx.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
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<pre>
As with other platforms vendors love to create their own boot header
formats. Xilinx is no different and for the Zynq platform/SoC there
exists the "boot.bin" which is read by the platforms bootrom. This
format is described to a useful extent within the Xilinx Zynq TRM.

This implementation adds support for the 'zynqimage' to mkimage. The
implementation only considers the most common boot header which is
un-encrypted and packed directly after the boot header itself (no
XIP, etc.). However this implementation does take into consideration the
other fields of the header for image dumping use cases (vector table and
register initialization).

Signed-off-by: Nathan Rossi &lt;nathan@nathanrossi.com&gt;
Cc: Michal Simek &lt;michal.simek@xilinx.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: Add support for the SD image</title>
<updated>2015-09-03T03:28:23+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-30T22:55:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f9a3c278b98a17eddbf0ad903689cce47e3e6f47'/>
<id>f9a3c278b98a17eddbf0ad903689cce47e3e6f47</id>
<content type='text'>
The Rockchip boot ROM requires a particular file format. It consists of
64KB of zeroes, a 512-byte header encoded with RC4, and then some executable
code.

Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be
converted to this format.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
The Rockchip boot ROM requires a particular file format. It consists of
64KB of zeroes, a 512-byte header encoded with RC4, and then some executable
code.

Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be
converted to this format.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: Add the rkimage format to mkimage</title>
<updated>2015-09-03T03:28:23+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-30T22:55:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a131c1f44231e3546b1cca8480400c98d1dd7ac8'/>
<id>a131c1f44231e3546b1cca8480400c98d1dd7ac8</id>
<content type='text'>
Rockchip SoCs require certain formats for code that they execute, The
simplest format is a 4-byte header at the start of a binary file. Add
support for this so that we can create images that the boot ROM understands.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Rockchip SoCs require certain formats for code that they execute, The
simplest format is a 4-byte header at the start of a binary file. Add
support for this so that we can create images that the boot ROM understands.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tools: remove mpc86x_clk tool</title>
<updated>2015-07-27T19:03:13+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-07-25T18:40:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9c5748775228f6648a99d1e28acef92012fa031e'/>
<id>9c5748775228f6648a99d1e28acef92012fa031e</id>
<content type='text'>
This is commented out in the Makefile for more than 10 years.
I assume it is proof that this tool is unused.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Pantelis Antoniou &lt;panto@intracom.gr&gt;
</content>
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<pre>
This is commented out in the Makefile for more than 10 years.
I assume it is proof that this tool is unused.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Pantelis Antoniou &lt;panto@intracom.gr&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>kwbimage: Rename CONFIG_SYS_SPI_U_BOOT_OFFS to CONFIG_SYS_U_BOOT_OFFS</title>
<updated>2015-07-24T07:46:21+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2015-07-20T09:20:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7ddf8cfb0ddc16c49adeee574ae5945c21790e1a'/>
<id>7ddf8cfb0ddc16c49adeee574ae5945c21790e1a</id>
<content type='text'>
To use this offset for other boot device (like SDIO/MMC), lets rename
it to a more generic name. This will be used be the SDIO/MMC SPL boot
support for the A38x.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Luka Perkov &lt;luka.perkov@sartura.hr&gt;
Cc: Dirk Eibach &lt;eibach@gdsys.de&gt;
</content>
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<pre>
To use this offset for other boot device (like SDIO/MMC), lets rename
it to a more generic name. This will be used be the SDIO/MMC SPL boot
support for the A38x.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Luka Perkov &lt;luka.perkov@sartura.hr&gt;
Cc: Dirk Eibach &lt;eibach@gdsys.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fdt: Add fdtgrep tool</title>
<updated>2015-07-21T23:39:20+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-06-23T21:38:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1043d0a0296a8580fd497a2eb1f411eb07ba98c1'/>
<id>1043d0a0296a8580fd497a2eb1f411eb07ba98c1</id>
<content type='text'>
This tool allows us to extract subsets of a device tree file. It is used by
the SPL vuild, which needs to cut down the device tree size for use in
limited memory.

This tool was originally written for libfdt but it has not been accepted
upstream, so for now, include it in U-Boot. Several utilfdt library
functions been included inline here.

If fdtgrep is eventually accepted in libfdt then we can bring that version
of libfdt in here, and drop fdtgrep (requiring that fdtgrep is provided by
the user).

If it is not accepted then another approach would be to write a special
tool for chopping down device tree files for SPL. While it would use the
same libfdt support, it would be less code than fdtgrep.c because it would
not have general-purpose functions.

Another approach (which was used with v1 of this series) is to sprinkler all
the device tree files with #ifdef. I don't like that idea.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This tool allows us to extract subsets of a device tree file. It is used by
the SPL vuild, which needs to cut down the device tree size for use in
limited memory.

This tool was originally written for libfdt but it has not been accepted
upstream, so for now, include it in U-Boot. Several utilfdt library
functions been included inline here.

If fdtgrep is eventually accepted in libfdt then we can bring that version
of libfdt in here, and drop fdtgrep (requiring that fdtgrep is provided by
the user).

If it is not accepted then another approach would be to write a special
tool for chopping down device tree files for SPL. While it would use the
same libfdt support, it would be less code than fdtgrep.c because it would
not have general-purpose functions.

Another approach (which was used with v1 of this series) is to sprinkler all
the device tree files with #ifdef. I don't like that idea.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tools: use pkg-config when available to get SSL flags</title>
<updated>2015-05-28T12:18:19+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2015-05-16T16:36:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4839836a124ea04e5867edf3db3bfb02cfa8d760'/>
<id>4839836a124ea04e5867edf3db3bfb02cfa8d760</id>
<content type='text'>
Instead of hardcoding -lssl -lcrypto as the flags needed to build
mkimage with FIT signature enabled, use pkg-config when
available. This allows to properly support cases where static linking
is used, which requires linking with -lz, since OpenSSL uses zlib
internally.

We gracefully fallback on the previous behavior of hardcoding -lssl
-lcrypto if pkg-config is not available or fails with an error.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
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<pre>
Instead of hardcoding -lssl -lcrypto as the flags needed to build
mkimage with FIT signature enabled, use pkg-config when
available. This allows to properly support cases where static linking
is used, which requires linking with -lz, since OpenSSL uses zlib
internally.

We gracefully fallback on the previous behavior of hardcoding -lssl
-lcrypto if pkg-config is not available or fails with an error.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
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