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| author | Siddharth Vadapalli <[email protected]> | 2026-02-27 17:28:34 +0530 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2026-03-09 09:35:50 -0600 |
| commit | f0bb3940b132d039a249815d34eea6fae5be60d6 (patch) | |
| tree | c7c8a11fe82cc6ea0e9a8fe5a051cb3d11d41451 | |
| parent | b04d709459073c6dc48cafd8eed9d14f552fdaa7 (diff) | |
configs: j722s_evm_a53_defconfig: enable 64-bit addressing for PCIe
The PCIe0 instance of PCIe on the J722S SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.
Signed-off-by: Siddharth Vadapalli <[email protected]>
Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
| -rw-r--r-- | configs/j722s_evm_a53_defconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/j722s_evm_a53_defconfig b/configs/j722s_evm_a53_defconfig index e84670c75ed..dc4b6b93803 100644 --- a/configs/j722s_evm_a53_defconfig +++ b/configs/j722s_evm_a53_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y +CONFIG_SYS_PCI_64BIT=y CONFIG_PCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTSTD_FULL=y |