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authorBalaji Selvanathan <[email protected]>2026-02-13 14:31:18 +0530
committerCasey Connolly <[email protected]>2026-03-24 11:34:58 +0100
commitc4f40d092590a7b4649d354c810114d5041f8cca (patch)
tree02e7ec8caf8fa4fe336968ecdc41806a338521f0
parenteb95914b9f5886b7ca0eaa2dbcd8a66bb8e5f81a (diff)
clk: qcom: qcs615: Add GCC_USB3_PRIM_CLKREF_CLK support
Add support for GCC_USB3_PRIM_CLKREF_CLK to the QCS615 clock driver. This clock is referenced in the device tree USB node but was not implemented in U-Boot, causing "Clock 152 not found" warnings during fastboot run. Signed-off-by: Balaji Selvanathan <[email protected]> Reviewed-by: Sumit Garg <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Casey Connolly <[email protected]>
-rw-r--r--drivers/clk/qcom/clock-qcs615.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/clock-qcs615.c b/drivers/clk/qcom/clock-qcs615.c
index 4700baba8c9..65b8db04020 100644
--- a/drivers/clk/qcom/clock-qcs615.c
+++ b/drivers/clk/qcom/clock-qcs615.c
@@ -66,6 +66,7 @@ static const struct gate_clk qcs615_clks[] = {
GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0xf050, BIT(0)),
GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0xf054, BIT(0)),
GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0xf058, BIT(0)),
+ GATE_CLK(GCC_USB3_PRIM_CLKREF_CLK, 0x8c014, BIT(0)),
GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x5200c, GCC_QUPV3_WRAP0_S0_CLK_ENA_BIT),
GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x5200c, GCC_QUPV3_WRAP0_S1_CLK_ENA_BIT),
GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x5200c, GCC_QUPV3_WRAP0_S2_CLK_ENA_BIT),