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| author | Quentin Schulz <[email protected]> | 2026-05-07 12:37:12 +0200 |
|---|---|---|
| committer | Jerome Forissier <[email protected]> | 2026-06-03 16:55:55 +0200 |
| commit | d17251269095d058c7bf463f6cfb4922ad357147 (patch) | |
| tree | c30b102de226f58932d994455e429c0bf51290ac /contrib/examples/httpd/https_example/https_example.c | |
| parent | 77cc22b8095cee92e5bd63b57b13fa7cf8ac8190 (diff) | |
net: SYS_RX_ETH_BUFFER defaults to 8 when CONFIG_FSL_ENETC=y
drivers/net/fsl_enetc.h specifies ENETC_BD_CNT "buffer descriptors count
must be a multiple of 8". This constant is set to
CONFIG_SYS_RX_ETH_BUFFER which defaults to 4.
All defconfigs enabling CONFIG_FSL_ENETC fortunately have it set to 8,
according to
./tools/qconfig.py -l -f CONFIG_FSL_ENETC '~CONFIG_SYS_RX_ETH_BUFFER=8'.
Let's make sure the default is sane by having it set to 8 when this
driver is enabled. Note that originally[1] it was said EEPRO100 and 405
EMAC should be 8 or higher. 405 (PPC405?) support seems to have been
dropped in commit b5e7c84f72ee ("ppc4xx: remove ASH405 board"), 11 years
ago. Maybe there's something we can do for EEPRO100 though?
Start all lines with a tab instead of spaces.
Specify limitation for FSL_ENETC in the help text.
[1] commit 53cf9435ccf9 ("- CFG_RX_ETH_BUFFER added.")
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Diffstat (limited to 'contrib/examples/httpd/https_example/https_example.c')
0 files changed, 0 insertions, 0 deletions
