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authorTom Rini <[email protected]>2026-07-15 13:54:07 -0600
committerTom Rini <[email protected]>2026-07-15 13:54:07 -0600
commit8163dab2e555ff93343d8aaa6f13d37d63c0bec2 (patch)
treef77b8976d2c4ee4a64d955197af88384c76392ae /lib/crypto/mscode_parser.c
parentd23b9d4f6ac76223d1354c7241790fb1b6d21fa5 (diff)
parent3ddd0f9bc879ab62522164b50c41181e909b9a0b (diff)
Merge patch series "mach-omap2: am33xx: ddr JEDEC spec fixups"
Bryan Brattlof <[email protected]> says: Someone figured out that we do not wait long enough for the DDR chip to be ready during initializing. During that debug it was also discovered we don't handle warm resets correctly. These 2 patches should fix this. I don't have a scope fast enough to prove these patches have fixed the reported issues but I am boot testing (cold and warm resets) with a BBB at my desk which seems to be OK with these applied. With how old these platforms are I doubt we will see any issue on our current devices and probably need a different DDR part to see any stability improvements but these should help stabilize board wakeups with different DDR parts. Link: https://lore.kernel.org/r/[email protected]
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