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authorTom Rini <[email protected]>2025-12-18 08:06:10 -0600
committerTom Rini <[email protected]>2025-12-18 08:06:10 -0600
commit930eff5416ea98ebd09cec73f5d06a7033b4d52e (patch)
tree55a54df2e4ee0314b1180d033c7a7bb34726b47a /test
parenta333d9e59f6675c9541c34643f334dbf50898647 (diff)
parent6f419247baa45917fcdd67062e271b8884d8c7aa (diff)
Merge tag 'u-boot-socfpga-next-20251217' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
This pull request brings together a set of fixes and enhancements across the SoCFPGA platform family, with a focus on MMC/SPL robustness, EFI boot enablement, and Agilex5 SD/eMMC support. CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/28776 Highlights: * SPL / MMC: o Fix Kconfig handling for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE o Correct raw sector calculations and respect explicit sector values when loading U-Boot from MMC in SPL o Adjust raw MMC loading logic for SoCFPGA platforms * EFI boot: o Permit EFI booting on SoCFPGA platforms o Disable mkeficapsule tool build for Arria 10 where unsupported * Agilex5: o Upgrade SDHCI controller from SD4HC to SD6HC o Enable MMC and Cadence SDHCI support in defconfig o Add dedicated eMMC device tree and defconfig for Agilex5 SoCDK o Revert incorrect GPIO configuration for SDIO_SEL o Refine U-Boot DT handling for SD and eMMC boot variants * SPI: o Allow disabling the DesignWare SPI driver in SPL via Kconfig * Board / configuration fixes: o Enable random MAC address generation for Cyclone V o Fix DE0-Nano-SoC boot configuration o Remove obsolete or conflicting options from multiple legacy SoCFPGA defconfigs
Diffstat (limited to 'test')
-rw-r--r--test/dm/fdtdec.c23
1 files changed, 17 insertions, 6 deletions
diff --git a/test/dm/fdtdec.c b/test/dm/fdtdec.c
index ea5a494612c..495f57234a4 100644
--- a/test/dm/fdtdec.c
+++ b/test/dm/fdtdec.c
@@ -14,14 +14,19 @@
DECLARE_GLOBAL_DATA_PTR;
+#define FDTDEC_MAX_SIZE (2 * 1024 * 1024)
+
static int dm_test_fdtdec_set_carveout(struct unit_test_state *uts)
{
struct fdt_memory resv;
void *blob;
const fdt32_t *prop;
- int blob_sz, len, offset;
+ int blob_sz, len, offset, fdt_sz;
+
+ fdt_sz = fdt_totalsize(gd->fdt_blob);
+ ut_assert(fdt_sz > 0 && fdt_sz < FDTDEC_MAX_SIZE);
- blob_sz = fdt_totalsize(gd->fdt_blob) + 4096;
+ blob_sz = fdt_sz + 4096;
blob = malloc(blob_sz);
ut_assertnonnull(blob);
@@ -67,10 +72,13 @@ static int dm_test_fdtdec_add_reserved_memory(struct unit_test_state *uts)
fdt_size_t size;
void *blob;
unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- int blob_sz, parent, subnode;
+ int blob_sz, parent, subnode, fdt_sz;
uint32_t phandle, phandle1;
- blob_sz = fdt_totalsize(gd->fdt_blob) + 128;
+ fdt_sz = fdt_totalsize(gd->fdt_blob);
+ ut_assert(fdt_sz > 0 && fdt_sz < FDTDEC_MAX_SIZE);
+
+ blob_sz = fdt_sz + 128;
blob = malloc(blob_sz);
ut_assertnonnull(blob);
@@ -138,14 +146,17 @@ static int dm_test_fdt_chosen_smbios(struct unit_test_state *uts)
void *blob;
ulong val;
struct smbios3_entry *entry;
- int chosen, blob_sz;
+ int chosen, blob_sz, fdt_sz;
const fdt64_t *prop;
if (!CONFIG_IS_ENABLED(GENERATE_SMBIOS_TABLE)) {
return -EAGAIN;
}
- blob_sz = fdt_totalsize(gd->fdt_blob) + 4096;
+ fdt_sz = fdt_totalsize(gd->fdt_blob);
+ ut_assert(fdt_sz > 0 && fdt_sz < FDTDEC_MAX_SIZE);
+
+ blob_sz = fdt_sz + 4096;
blob = memalign(8, blob_sz);
ut_assertnonnull(blob);