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-rw-r--r--MAINTAINERS9
-rw-r--r--Makefile10
-rw-r--r--arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h4
-rw-r--r--arch/arm/include/asm/arch-adi/sc5xx/soc.h4
-rw-r--r--arch/arm/include/asm/arch-adi/sc5xx/spl.h4
-rw-r--r--arch/arm/mach-k3/arm64/arm64-mmu.c16
-rw-r--r--arch/arm/mach-k3/include/mach/k3-ddr.h11
-rw-r--r--arch/arm/mach-sc5xx/Kconfig5
-rw-r--r--arch/arm/mach-sc5xx/Makefile5
-rw-r--r--arch/arm/mach-sc5xx/config.mk5
-rw-r--r--arch/arm/mach-sc5xx/init/Makefile5
-rw-r--r--arch/arm/mach-sc5xx/init/clkinit.c4
-rw-r--r--arch/arm/mach-sc5xx/init/clkinit.h4
-rw-r--r--arch/arm/mach-sc5xx/init/dmcinit.c4
-rw-r--r--arch/arm/mach-sc5xx/init/dmcinit.h4
-rw-r--r--arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h4
-rw-r--r--arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h4
-rw-r--r--arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h4
-rw-r--r--arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h4
-rw-r--r--arch/arm/mach-sc5xx/rcu.c3
-rw-r--r--arch/arm/mach-sc5xx/sc57x.c4
-rw-r--r--arch/arm/mach-sc5xx/sc58x.c4
-rw-r--r--arch/arm/mach-sc5xx/sc59x.c4
-rw-r--r--arch/arm/mach-sc5xx/sc59x_64.c4
-rw-r--r--arch/arm/mach-sc5xx/soc.c4
-rw-r--r--arch/arm/mach-sc5xx/spl.c4
-rw-r--r--board/raspberrypi/rpi/rpi.c99
-rw-r--r--boot/image-fit-sig.c227
-rw-r--r--boot/image-fit.c4
-rw-r--r--configs/am64x_evm_a53_defconfig1
-rw-r--r--configs/j7200_evm_a72_defconfig1
-rw-r--r--configs/j722s_evm_a53_defconfig1
-rw-r--r--configs/j784s4_evm_a72_defconfig6
-rw-r--r--doc/develop/release_cycle.rst2
-rw-r--r--doc/usage/fit/signature.rst19
-rw-r--r--drivers/clk/adi/Kconfig5
-rw-r--r--drivers/clk/adi/Makefile5
-rw-r--r--drivers/clk/adi/clk-adi-pll.c2
-rw-r--r--drivers/clk/adi/clk-adi-sc57x.c2
-rw-r--r--drivers/clk/adi/clk-adi-sc58x.c2
-rw-r--r--drivers/clk/adi/clk-adi-sc594.c2
-rw-r--r--drivers/clk/adi/clk-adi-sc598.c2
-rw-r--r--drivers/clk/adi/clk-shared.c2
-rw-r--r--drivers/clk/adi/clk.h2
-rw-r--r--drivers/dma/adi_dma.c5
-rw-r--r--drivers/gpio/adp5588_gpio.c4
-rw-r--r--drivers/gpio/gpio-adi-adsp.c3
-rw-r--r--drivers/i2c/adi_i2c.c4
-rw-r--r--drivers/mmc/adi_sdhci.c4
-rw-r--r--drivers/net/dwc_eth_qos_adi.c3
-rw-r--r--drivers/pci/pcie_cdns_ti.c10
-rw-r--r--drivers/phy/Kconfig10
-rw-r--r--drivers/phy/Makefile1
-rw-r--r--drivers/phy/phy-mtk-ufs.c190
-rw-r--r--drivers/pinctrl/broadcom/pinctrl-bcm283x.c16
-rw-r--r--drivers/pinctrl/pinctrl-adi-adsp.c3
-rw-r--r--drivers/remoteproc/adi_sc5xx_rproc.c4
-rw-r--r--drivers/serial/serial_adi_uart4.c4
-rw-r--r--drivers/spi/adi_spi3.c6
-rw-r--r--drivers/timer/adi_sc5xx_timer.c3
-rw-r--r--drivers/ufs/cdns-platform.c1
-rw-r--r--drivers/ufs/ufs-amd-versal2.c1
-rw-r--r--drivers/ufs/ufs-pci.c1
-rw-r--r--drivers/ufs/ufs-qcom.c1
-rw-r--r--drivers/ufs/ufs-renesas-rcar-gen5.c1
-rw-r--r--drivers/ufs/ufs-renesas.c1
-rw-r--r--drivers/ufs/ufs-rockchip.c1
-rw-r--r--drivers/ufs/ufs-uclass.c12
-rw-r--r--drivers/ufs/ufshcd-dwc.c1
-rw-r--r--drivers/usb/musb-new/sc5xx.c2
-rw-r--r--drivers/video/stm32/stm32_dsi.c164
-rw-r--r--drivers/watchdog/adi_wdt.c4
-rw-r--r--include/dt-bindings/clock/adi-sc5xx-clock.h4
-rw-r--r--include/dt-bindings/pinctrl/adi-adsp.h4
-rw-r--r--include/ufs.h9
-rw-r--r--test/py/tests/test_vboot.py8
-rw-r--r--tools/Makefile2
-rw-r--r--tools/atmelimage.c2
78 files changed, 673 insertions, 337 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 56aa82eecbc..d4b527560aa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -626,15 +626,12 @@ S: Supported
F: arch/arm/dts/am335x-sancloud*
ARM SC5XX
-M: Nathan Barrett-Morrison <[email protected]>
M: Greg Malysa <[email protected]>
-M: Ian Roberts <[email protected]>
M: Vasileios Bimpikas <[email protected]>
-M: Utsav Agarwal <[email protected]>
M: Arturs Artamonovs <[email protected]>
S: Supported
-T: git https://github.com/analogdevicesinc/lnxdsp-u-boot
+T: git https://github.com/analogdevicesinc/u-boot
F: arch/arm/dts/sc5*
F: arch/arm/include/asm/arch-adi/
F: arch/arm/mach-sc5xx/
@@ -1756,7 +1753,7 @@ F: drivers/mtd/nand/spi/
SPI-NOR
M: Vignesh R <[email protected]>
-R: Tudor Ambarus <[email protected]>
+R: Takahiro Kuwano <[email protected]>
S: Maintained
F: drivers/mtd/spi/
F: include/spi_flash.h
diff --git a/Makefile b/Makefile
index fdaba4895fe..bbe0c366729 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
VERSION = 2026
PATCHLEVEL = 04
SUBLEVEL =
-EXTRAVERSION = -rc3
+EXTRAVERSION = -rc4
NAME =
# *DOCUMENTATION*
@@ -194,10 +194,6 @@ endif # sub_make_done
# We process the rest of the Makefile if this is the final invocation of make
ifeq ($(need-sub-make),)
-# Do not propagate sub_make_done to non-submake children (e.g. test scripts
-# that invoke make separately with O= need to process the KBUILD_OUTPUT block)
-unexport sub_make_done
-
# Do not print "Entering directory ...",
# but we want to display it when entering to the output directory
# so that IDEs/editors are able to understand relative filenames.
@@ -2741,6 +2737,10 @@ help:
@echo 'Execute "make" or "make all" to build all targets marked with [*] '
@echo 'For further info see the ./README file'
+ifneq ($(filter tests pcheck qcheck tcheck,$(MAKECMDGOALS)),)
+export sub_make_done := 0
+endif
+
tests check:
$(srctree)/test/run
diff --git a/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h b/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h
index 683e3d412ce..c80de67d7ae 100644
--- a/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h
+++ b/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#ifndef ARCH_ADI_SC5XX_SC5XX_H
#define ARCH_ADI_SC5XX_SC5XX_H
diff --git a/arch/arm/include/asm/arch-adi/sc5xx/soc.h b/arch/arm/include/asm/arch-adi/sc5xx/soc.h
index 430dbe2dae4..065d272acab 100644
--- a/arch/arm/include/asm/arch-adi/sc5xx/soc.h
+++ b/arch/arm/include/asm/arch-adi/sc5xx/soc.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#ifndef BOARD_ADI_COMMON_SOC_H
diff --git a/arch/arm/include/asm/arch-adi/sc5xx/spl.h b/arch/arm/include/asm/arch-adi/sc5xx/spl.h
index c215e6b892a..077667daa10 100644
--- a/arch/arm/include/asm/arch-adi/sc5xx/spl.h
+++ b/arch/arm/include/asm/arch-adi/sc5xx/spl.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#ifndef ARCH_ADI_SC5XX_SPL_H
#define ARCH_ADI_SC5XX_SPL_H
diff --git a/arch/arm/mach-k3/arm64/arm64-mmu.c b/arch/arm/mach-k3/arm64/arm64-mmu.c
index f999af143fb..e032755db0d 100644
--- a/arch/arm/mach-k3/arm64/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64/arm64-mmu.c
@@ -29,6 +29,22 @@ struct mm_region k3_mem_map[K3_MEM_MAP_LEN] = {
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, { /*
+ * PCIe 4 GB Address Window for AM64 and J722S SoCs starts
+ * from 0x6_0000_0000 and has a size of 0x1_0000_0000.
+ * Since this is already enabled by the 'Flash Peripherals'
+ * region above, we don't need to add it again.
+ *
+ * The PCIe 4 GB Address Windows for AM68, AM69, J7200, J721E,
+ * J721S2, J742S2 and J784S4 SoCs are enabled by the following
+ * region.
+ */
+ .virt = 0x4000000000UL,
+ .phys = 0x4000000000UL,
+ .size = 0x400000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, [K3_MEM_MAP_FIRST_BANK_IDX] = { /* First DRAM Bank of size 2G */
.virt = CFG_SYS_SDRAM_BASE,
.phys = CFG_SYS_SDRAM_BASE,
diff --git a/arch/arm/mach-k3/include/mach/k3-ddr.h b/arch/arm/mach-k3/include/mach/k3-ddr.h
index 207e60b2763..6ac7f682fb8 100644
--- a/arch/arm/mach-k3/include/mach/k3-ddr.h
+++ b/arch/arm/mach-k3/include/mach/k3-ddr.h
@@ -8,11 +8,14 @@
#include <spl.h>
-/* We need 3 extra entries for:
- * SoC peripherals, flash and the sentinel value.
+/* We need 4 extra entries for:
+ * 1. SoC peripherals
+ * 2. Flash
+ * 3. PCIe 4GB Windows for AM68, AM69, J7200, J721E, J721S2, J742S2 and J784S4 SoCs
+ * 4. Sentinel value
*/
-#define K3_MEM_MAP_LEN ((CONFIG_NR_DRAM_BANKS) + 3)
-#define K3_MEM_MAP_FIRST_BANK_IDX 2
+#define K3_MEM_MAP_LEN ((CONFIG_NR_DRAM_BANKS) + 4)
+#define K3_MEM_MAP_FIRST_BANK_IDX 3
int dram_init(void);
int dram_init_banksize(void);
diff --git a/arch/arm/mach-sc5xx/Kconfig b/arch/arm/mach-sc5xx/Kconfig
index ec1d5539dc9..1486656b36b 100644
--- a/arch/arm/mach-sc5xx/Kconfig
+++ b/arch/arm/mach-sc5xx/Kconfig
@@ -2,10 +2,7 @@
#
# (C) Copyright 2022 - Analog Devices, Inc.
#
-# Written and/or maintained by Timesys Corporation
-#
-# Contact: Nathan Barrett-Morrison <[email protected]>
-# Contact: Greg Malysa <[email protected]>
+# Written by Timesys Corporation
#
# All 32-bit platforms require SYS_ARM_CACHE_WRITETHROUGH
diff --git a/arch/arm/mach-sc5xx/Makefile b/arch/arm/mach-sc5xx/Makefile
index 47b28200a03..4aaf94f6b9f 100644
--- a/arch/arm/mach-sc5xx/Makefile
+++ b/arch/arm/mach-sc5xx/Makefile
@@ -2,10 +2,7 @@
#
# (C) Copyright 2022 - Analog Devices, Inc.
#
-# Written and/or maintained by Timesys Corporation
-#
-# Contact: Nathan Barrett-Morrison <[email protected]>
-# Contact: Greg Malysa <[email protected]>
+# Written by Timesys Corporation
#
obj-y += soc.o init/
diff --git a/arch/arm/mach-sc5xx/config.mk b/arch/arm/mach-sc5xx/config.mk
index b4eb1c42810..85889f54e89 100644
--- a/arch/arm/mach-sc5xx/config.mk
+++ b/arch/arm/mach-sc5xx/config.mk
@@ -2,10 +2,7 @@
#
# (C) Copyright 2022 - Analog Devices, Inc.
#
-# Written and/or maintained by Timesys Corporation
-#
-# Contact: Nathan Barrett-Morrison <[email protected]>
-# Contact: Greg Malysa <[email protected]>
+# Written by Timesys Corporation
#
ifdef CONFIG_XPL_BUILD
diff --git a/arch/arm/mach-sc5xx/init/Makefile b/arch/arm/mach-sc5xx/init/Makefile
index 9d4920fe076..6f99bdaeb72 100644
--- a/arch/arm/mach-sc5xx/init/Makefile
+++ b/arch/arm/mach-sc5xx/init/Makefile
@@ -2,10 +2,7 @@
#
# (C) Copyright 2022 - Analog Devices, Inc.
#
-# Written and/or maintained by Timesys Corporation
-#
-# Contact: Nathan Barrett-Morrison <[email protected]>
-# Contact: Greg Malysa <[email protected]>
+# Written by Timesys Corporation
#
obj-y += dmcinit.o clkinit.o
diff --git a/arch/arm/mach-sc5xx/init/clkinit.c b/arch/arm/mach-sc5xx/init/clkinit.c
index ae53cd61efd..3dcba33bd1b 100644
--- a/arch/arm/mach-sc5xx/init/clkinit.c
+++ b/arch/arm/mach-sc5xx/init/clkinit.c
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#include <asm/arch-adi/sc5xx/sc5xx.h>
diff --git a/arch/arm/mach-sc5xx/init/clkinit.h b/arch/arm/mach-sc5xx/init/clkinit.h
index b05f4325bfc..035a766d266 100644
--- a/arch/arm/mach-sc5xx/init/clkinit.h
+++ b/arch/arm/mach-sc5xx/init/clkinit.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#ifndef CLKINIT_H_
diff --git a/arch/arm/mach-sc5xx/init/dmcinit.c b/arch/arm/mach-sc5xx/init/dmcinit.c
index 30b77aee459..2bf2cc53a9f 100644
--- a/arch/arm/mach-sc5xx/init/dmcinit.c
+++ b/arch/arm/mach-sc5xx/init/dmcinit.c
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#include <asm/io.h>
diff --git a/arch/arm/mach-sc5xx/init/dmcinit.h b/arch/arm/mach-sc5xx/init/dmcinit.h
index 46ff729282d..6ddabdbf325 100644
--- a/arch/arm/mach-sc5xx/init/dmcinit.h
+++ b/arch/arm/mach-sc5xx/init/dmcinit.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#ifndef DMCINIT_H_
diff --git a/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h b/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h
index a5838370555..0cb1184c236 100644
--- a/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h
+++ b/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#ifndef IS43TR16512BL_H
diff --git a/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h b/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h
index 882777521b8..7c1381e5a18 100644
--- a/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h
+++ b/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#ifndef MT41K128M16JT_H
diff --git a/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h b/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h
index 5735b87871c..21e3f44ccb5 100644
--- a/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h
+++ b/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#ifndef MT41K512M16HA_H
diff --git a/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h b/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h
index 5ada7f2985b..b0d012818cf 100644
--- a/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h
+++ b/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#ifndef MT47H128M16RT_H
diff --git a/arch/arm/mach-sc5xx/rcu.c b/arch/arm/mach-sc5xx/rcu.c
index 49357501a93..c9911be91d6 100644
--- a/arch/arm/mach-sc5xx/rcu.c
+++ b/arch/arm/mach-sc5xx/rcu.c
@@ -2,9 +2,8 @@
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Ian Roberts <[email protected]>
*/
#include <dm.h>
diff --git a/arch/arm/mach-sc5xx/sc57x.c b/arch/arm/mach-sc5xx/sc57x.c
index b0587686d73..02b04cd1b2f 100644
--- a/arch/arm/mach-sc5xx/sc57x.c
+++ b/arch/arm/mach-sc5xx/sc57x.c
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#include <asm/io.h>
diff --git a/arch/arm/mach-sc5xx/sc58x.c b/arch/arm/mach-sc5xx/sc58x.c
index 0f892774309..c981cafd986 100644
--- a/arch/arm/mach-sc5xx/sc58x.c
+++ b/arch/arm/mach-sc5xx/sc58x.c
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#include <asm/io.h>
diff --git a/arch/arm/mach-sc5xx/sc59x.c b/arch/arm/mach-sc5xx/sc59x.c
index 174c6f5c445..675f8c7d69a 100644
--- a/arch/arm/mach-sc5xx/sc59x.c
+++ b/arch/arm/mach-sc5xx/sc59x.c
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#include <asm/io.h>
diff --git a/arch/arm/mach-sc5xx/sc59x_64.c b/arch/arm/mach-sc5xx/sc59x_64.c
index 001747f223d..a8402075d0a 100644
--- a/arch/arm/mach-sc5xx/sc59x_64.c
+++ b/arch/arm/mach-sc5xx/sc59x_64.c
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#include <asm/io.h>
diff --git a/arch/arm/mach-sc5xx/soc.c b/arch/arm/mach-sc5xx/soc.c
index 8f13127a660..cf8ff0dc3af 100644
--- a/arch/arm/mach-sc5xx/soc.c
+++ b/arch/arm/mach-sc5xx/soc.c
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#include <asm/arch-adi/sc5xx/sc5xx.h>
diff --git a/arch/arm/mach-sc5xx/spl.c b/arch/arm/mach-sc5xx/spl.c
index 68e0310f5af..c529829420d 100644
--- a/arch/arm/mach-sc5xx/spl.c
+++ b/arch/arm/mach-sc5xx/spl.c
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#include <spl.h>
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index f9b643555dd..7f69e5b6163 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -94,120 +94,128 @@ struct efi_capsule_update_info update_info = {
*/
struct rpi_model {
const char *name;
- const char *fdtfile;
+ const char * const *fdtfiles;
+ size_t fdtcount;
bool has_onboard_eth;
};
+#define FDTFILES(...) \
+ (const char *[]){ __VA_ARGS__ }, \
+ sizeof((const char *[]){ __VA_ARGS__ }) / sizeof(const char *)
+
static const struct rpi_model rpi_model_unknown = {
"Unknown model",
- DTB_DIR "bcm283x-rpi-other.dtb",
+ FDTFILES(DTB_DIR "bcm283x-rpi-other.dtb"),
false,
};
static const struct rpi_model rpi_models_new_scheme[] = {
[0x0] = {
"Model A",
- DTB_DIR "bcm2835-rpi-a.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-a.dtb"),
false,
},
[0x1] = {
"Model B",
- DTB_DIR "bcm2835-rpi-b.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b.dtb"),
true,
},
[0x2] = {
"Model A+",
- DTB_DIR "bcm2835-rpi-a-plus.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-a-plus.dtb"),
false,
},
[0x3] = {
"Model B+",
- DTB_DIR "bcm2835-rpi-b-plus.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b-plus.dtb"),
true,
},
[0x4] = {
"2 Model B",
- DTB_DIR "bcm2836-rpi-2-b.dtb",
+ FDTFILES(DTB_DIR "bcm2836-rpi-2-b.dtb"),
true,
},
[0x6] = {
"Compute Module",
- DTB_DIR "bcm2835-rpi-cm.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-cm.dtb"),
false,
},
[0x8] = {
"3 Model B",
- DTB_DIR "bcm2837-rpi-3-b.dtb",
+ FDTFILES(DTB_DIR "bcm2837-rpi-3-b.dtb"),
true,
},
[0x9] = {
"Zero",
- DTB_DIR "bcm2835-rpi-zero.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-zero.dtb"),
false,
},
[0xA] = {
"Compute Module 3",
- DTB_DIR "bcm2837-rpi-cm3.dtb",
+ FDTFILES(DTB_DIR "bcm2837-rpi-cm3.dtb"),
false,
},
[0xC] = {
"Zero W",
- DTB_DIR "bcm2835-rpi-zero-w.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-zero-w.dtb"),
false,
},
[0xD] = {
"3 Model B+",
- DTB_DIR "bcm2837-rpi-3-b-plus.dtb",
+ FDTFILES(DTB_DIR "bcm2837-rpi-3-b-plus.dtb"),
true,
},
[0xE] = {
"3 Model A+",
- DTB_DIR "bcm2837-rpi-3-a-plus.dtb",
+ FDTFILES(DTB_DIR "bcm2837-rpi-3-a-plus.dtb"),
false,
},
[0x10] = {
"Compute Module 3+",
- DTB_DIR "bcm2837-rpi-cm3.dtb",
+ FDTFILES(DTB_DIR "bcm2837-rpi-cm3.dtb"),
false,
},
[0x11] = {
"4 Model B",
- DTB_DIR "bcm2711-rpi-4-b.dtb",
+ FDTFILES(DTB_DIR "bcm2711-rpi-4-b.dtb"),
true,
},
[0x12] = {
"Zero 2 W",
- DTB_DIR "bcm2837-rpi-zero-2-w.dtb",
+ FDTFILES(DTB_DIR "bcm2837-rpi-zero-2-w.dtb"),
false,
},
[0x13] = {
"400",
- DTB_DIR "bcm2711-rpi-400.dtb",
+ FDTFILES(DTB_DIR "bcm2711-rpi-400.dtb"),
true,
},
[0x14] = {
"Compute Module 4",
- DTB_DIR "bcm2711-rpi-cm4.dtb",
+ FDTFILES(DTB_DIR "bcm2711-rpi-cm4.dtb"),
true,
},
[0x17] = {
"5 Model B",
- DTB_DIR "bcm2712-rpi-5-b.dtb",
+ FDTFILES(
+ [0] = DTB_DIR "bcm2712-rpi-5-b.dtb",
+ [1] = DTB_DIR "bcm2712d0-rpi-5-b.dtb"
+ ),
true,
},
[0x18] = {
"Compute Module 5",
- DTB_DIR "bcm2712-rpi-cm5-cm5io.dtb",
+ FDTFILES(DTB_DIR "bcm2712-rpi-cm5-cm5io.dtb"),
true,
},
[0x19] = {
"500",
- DTB_DIR "bcm2712-rpi-500.dtb",
+ FDTFILES(DTB_DIR "bcm2712-rpi-500.dtb"),
true,
},
[0x1A] = {
"Compute Module 5 Lite",
- DTB_DIR "bcm2712-rpi-cm5l-cm5io.dtb",
+ FDTFILES(DTB_DIR "bcm2712-rpi-cm5l-cm5io.dtb"),
true,
},
};
@@ -215,87 +223,87 @@ static const struct rpi_model rpi_models_new_scheme[] = {
static const struct rpi_model rpi_models_old_scheme[] = {
[0x2] = {
"Model B",
- DTB_DIR "bcm2835-rpi-b.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b.dtb"),
true,
},
[0x3] = {
"Model B",
- DTB_DIR "bcm2835-rpi-b.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b.dtb"),
true,
},
[0x4] = {
"Model B rev2",
- DTB_DIR "bcm2835-rpi-b-rev2.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b-rev2.dtb"),
true,
},
[0x5] = {
"Model B rev2",
- DTB_DIR "bcm2835-rpi-b-rev2.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b-rev2.dtb"),
true,
},
[0x6] = {
"Model B rev2",
- DTB_DIR "bcm2835-rpi-b-rev2.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b-rev2.dtb"),
true,
},
[0x7] = {
"Model A",
- DTB_DIR "bcm2835-rpi-a.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-a.dtb"),
false,
},
[0x8] = {
"Model A",
- DTB_DIR "bcm2835-rpi-a.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-a.dtb"),
false,
},
[0x9] = {
"Model A",
- DTB_DIR "bcm2835-rpi-a.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-a.dtb"),
false,
},
[0xd] = {
"Model B rev2",
- DTB_DIR "bcm2835-rpi-b-rev2.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b-rev2.dtb"),
true,
},
[0xe] = {
"Model B rev2",
- DTB_DIR "bcm2835-rpi-b-rev2.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b-rev2.dtb"),
true,
},
[0xf] = {
"Model B rev2",
- DTB_DIR "bcm2835-rpi-b-rev2.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b-rev2.dtb"),
true,
},
[0x10] = {
"Model B+",
- DTB_DIR "bcm2835-rpi-b-plus.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b-plus.dtb"),
true,
},
[0x11] = {
"Compute Module",
- DTB_DIR "bcm2835-rpi-cm.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-cm.dtb"),
false,
},
[0x12] = {
"Model A+",
- DTB_DIR "bcm2835-rpi-a-plus.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-a-plus.dtb"),
false,
},
[0x13] = {
"Model B+",
- DTB_DIR "bcm2835-rpi-b-plus.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-b-plus.dtb"),
true,
},
[0x14] = {
"Compute Module",
- DTB_DIR "bcm2835-rpi-cm.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-cm.dtb"),
false,
},
[0x15] = {
"Model A+",
- DTB_DIR "bcm2835-rpi-a-plus.dtb",
+ FDTFILES(DTB_DIR "bcm2835-rpi-a-plus.dtb"),
false,
},
};
@@ -361,11 +369,17 @@ int dram_init_banksize(void)
static void set_fdtfile(void)
{
const char *fdtfile;
+ int rev = revision & 0x0f;
if (env_get("fdtfile"))
return;
- fdtfile = model->fdtfile;
+ /* set the first entry as default */
+ fdtfile = model->fdtfiles[0];
+
+ if (rev < model->fdtcount)
+ fdtfile = model->fdtfiles[rev];
+
env_set("fdtfile", fdtfile);
}
@@ -608,6 +622,9 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt)
/* warnings from the firmware (if any) */
copy_property(fdt, fw_fdt, "/chosen", "user-warnings");
+ /* firmware logs - used by the vclog utility */
+ copy_property(fdt, fw_fdt, "/chosen", "log");
+
/* address of the PHY device as provided by the firmware */
copy_property(fdt, fw_fdt, "ethernet0/mdio@e14/ethernet-phy@1", "reg");
diff --git a/boot/image-fit-sig.c b/boot/image-fit-sig.c
index f23e9d5d0b0..f426ead13c0 100644
--- a/boot/image-fit-sig.c
+++ b/boot/image-fit-sig.c
@@ -18,6 +18,7 @@ DECLARE_GLOBAL_DATA_PTR;
#include <u-boot/hash-checksum.h>
#define IMAGE_MAX_HASHED_NODES 100
+#define FIT_MAX_HASH_PATH_BUF 4096
/**
* fit_region_make_list() - Make a list of image regions
@@ -230,6 +231,179 @@ int fit_image_verify_required_sigs(const void *fit, int image_noffset,
}
/**
+ * fit_config_add_hash() - Add hash nodes for one image to the node list
+ *
+ * Adds the image path, all its hash-* subnode paths, and its cipher
+ * subnode path (if present) to the packed buffer.
+ *
+ * @fit: FIT blob
+ * @image_noffset: Image node offset (e.g. /images/kernel-1)
+ * @node_inc: Array of path pointers to fill
+ * @count: Pointer to current count (updated on return)
+ * @max_nodes: Maximum entries in @node_inc
+ * @buf: Buffer for packed path strings
+ * @buf_used: Pointer to bytes used in @buf (updated on return)
+ * @buf_len: Total size of @buf
+ * Return: 0 on success, -ve on error
+ */
+static int fit_config_add_hash(const void *fit, int image_noffset,
+ char **node_inc, int *count, int max_nodes,
+ char *buf, int *buf_used, int buf_len)
+{
+ int noffset, hash_count, ret, len;
+
+ if (*count >= max_nodes)
+ return -ENOSPC;
+
+ ret = fdt_get_path(fit, image_noffset, buf + *buf_used,
+ buf_len - *buf_used);
+ if (ret < 0)
+ return -ENOENT;
+ len = strlen(buf + *buf_used) + 1;
+ node_inc[(*count)++] = buf + *buf_used;
+ *buf_used += len;
+
+ /* Add all this image's hash subnodes */
+ hash_count = 0;
+ for (noffset = fdt_first_subnode(fit, image_noffset);
+ noffset >= 0;
+ noffset = fdt_next_subnode(fit, noffset)) {
+ const char *name = fit_get_name(fit, noffset, NULL);
+
+ if (strncmp(name, FIT_HASH_NODENAME,
+ strlen(FIT_HASH_NODENAME)))
+ continue;
+ if (*count >= max_nodes)
+ return -ENOSPC;
+ ret = fdt_get_path(fit, noffset, buf + *buf_used,
+ buf_len - *buf_used);
+ if (ret < 0)
+ return -ENOENT;
+ len = strlen(buf + *buf_used) + 1;
+ node_inc[(*count)++] = buf + *buf_used;
+ *buf_used += len;
+ hash_count++;
+ }
+
+ if (!hash_count) {
+ printf("No hash nodes in image '%s'\n",
+ fdt_get_name(fit, image_noffset, NULL));
+ return -ENOMSG;
+ }
+
+ /* Add this image's cipher node if present */
+ noffset = fdt_subnode_offset(fit, image_noffset, FIT_CIPHER_NODENAME);
+ if (noffset != -FDT_ERR_NOTFOUND) {
+ if (noffset < 0)
+ return -EIO;
+ if (*count >= max_nodes)
+ return -ENOSPC;
+ ret = fdt_get_path(fit, noffset, buf + *buf_used,
+ buf_len - *buf_used);
+ if (ret < 0)
+ return -ENOENT;
+ len = strlen(buf + *buf_used) + 1;
+ node_inc[(*count)++] = buf + *buf_used;
+ *buf_used += len;
+ }
+
+ return 0;
+}
+
+/**
+ * fit_config_get_hash_list() - Build the list of nodes to hash
+ *
+ * Works through every image referenced by the configuration and collects the
+ * node paths: root + config + all referenced images with their hash and
+ * cipher subnodes.
+ *
+ * Properties known not to be image references (description, compatible,
+ * default, load-only) are skipped, so any new image type is covered by default.
+ *
+ * @fit: FIT blob
+ * @conf_noffset: Configuration node offset
+ * @node_inc: Array to fill with path string pointers
+ * @max_nodes: Size of @node_inc array
+ * @buf: Buffer for packed null-terminated path strings
+ * @buf_len: Size of @buf
+ * Return: number of entries in @node_inc, or -ve on error
+ */
+static int fit_config_get_hash_list(const void *fit, int conf_noffset,
+ char **node_inc, int max_nodes,
+ char *buf, int buf_len)
+{
+ const char *conf_name;
+ int image_count;
+ int prop_offset;
+ int used = 0;
+ int count = 0;
+ int ret, len;
+
+ conf_name = fit_get_name(fit, conf_noffset, NULL);
+
+ /* Always include the root node and the configuration node */
+ if (max_nodes < 2)
+ return -ENOSPC;
+
+ len = 2; /* "/" + nul */
+ if (len > buf_len)
+ return -ENOSPC;
+ strcpy(buf, "/");
+ node_inc[count++] = buf;
+ used += len;
+
+ len = snprintf(buf + used, buf_len - used, "%s/%s", FIT_CONFS_PATH,
+ conf_name) + 1;
+ if (used + len > buf_len)
+ return -ENOSPC;
+ node_inc[count++] = buf + used;
+ used += len;
+
+ /* Process each image referenced by the config */
+ image_count = 0;
+ fdt_for_each_property_offset(prop_offset, fit, conf_noffset) {
+ const char *prop_name;
+ int img_count, i;
+
+ fdt_getprop_by_offset(fit, prop_offset, &prop_name, NULL);
+ if (!prop_name)
+ continue;
+
+ /* Skip properties that are not image references */
+ if (!strcmp(prop_name, FIT_DESC_PROP) ||
+ !strcmp(prop_name, FIT_COMPAT_PROP) ||
+ !strcmp(prop_name, FIT_DEFAULT_PROP))
+ continue;
+
+ img_count = fdt_stringlist_count(fit, conf_noffset, prop_name);
+ for (i = 0; i < img_count; i++) {
+ int noffset;
+
+ noffset = fit_conf_get_prop_node_index(fit,
+ conf_noffset,
+ prop_name, i);
+ if (noffset < 0)
+ continue;
+
+ ret = fit_config_add_hash(fit, noffset, node_inc,
+ &count, max_nodes, buf, &used,
+ buf_len);
+ if (ret < 0)
+ return ret;
+
+ image_count++;
+ }
+ }
+
+ if (!image_count) {
+ printf("No images in config '%s'\n", conf_name);
+ return -ENOMSG;
+ }
+
+ return count;
+}
+
+/**
* fit_config_check_sig() - Check the signature of a config
*
* Here we are looking at a particular signature that needs verification (here
@@ -269,20 +443,16 @@ static int fit_config_check_sig(const void *fit, int noffset, int conf_noffset,
FIT_DATA_POSITION_PROP,
FIT_DATA_OFFSET_PROP,
};
-
- const char *prop, *end, *name;
+ char *node_inc[IMAGE_MAX_HASHED_NODES];
+ char hash_buf[FIT_MAX_HASH_PATH_BUF];
struct image_sign_info info;
const uint32_t *strings;
- const char *config_name;
uint8_t *fit_value;
int fit_value_len;
- bool found_config;
int max_regions;
- int i, prop_len;
char path[200];
int count;
- config_name = fit_get_name(fit, conf_noffset, NULL);
debug("%s: fdt=%p, conf='%s', sig='%s'\n", __func__, key_blob,
fit_get_name(fit, noffset, NULL),
fit_get_name(key_blob, required_keynode, NULL));
@@ -297,45 +467,12 @@ static int fit_config_check_sig(const void *fit, int noffset, int conf_noffset,
return -1;
}
- /* Count the number of strings in the property */
- prop = fdt_getprop(fit, noffset, "hashed-nodes", &prop_len);
- end = prop ? prop + prop_len : prop;
- for (name = prop, count = 0; name < end; name++)
- if (!*name)
- count++;
- if (!count) {
- *err_msgp = "Can't get hashed-nodes property";
- return -1;
- }
-
- if (prop && prop_len > 0 && prop[prop_len - 1] != '\0') {
- *err_msgp = "hashed-nodes property must be null-terminated";
- return -1;
- }
-
- /* Add a sanity check here since we are using the stack */
- if (count > IMAGE_MAX_HASHED_NODES) {
- *err_msgp = "Number of hashed nodes exceeds maximum";
- return -1;
- }
-
- /* Create a list of node names from those strings */
- char *node_inc[count];
-
- debug("Hash nodes (%d):\n", count);
- found_config = false;
- for (name = prop, i = 0; name < end; name += strlen(name) + 1, i++) {
- debug(" '%s'\n", name);
- node_inc[i] = (char *)name;
- if (!strncmp(FIT_CONFS_PATH, name, strlen(FIT_CONFS_PATH)) &&
- name[sizeof(FIT_CONFS_PATH) - 1] == '/' &&
- !strcmp(name + sizeof(FIT_CONFS_PATH), config_name)) {
- debug(" (found config node %s)", config_name);
- found_config = true;
- }
- }
- if (!found_config) {
- *err_msgp = "Selected config not in hashed nodes";
+ /* Build the node list from the config, ignoring hashed-nodes */
+ count = fit_config_get_hash_list(fit, conf_noffset,
+ node_inc, IMAGE_MAX_HASHED_NODES,
+ hash_buf, sizeof(hash_buf));
+ if (count < 0) {
+ *err_msgp = "Failed to build hash node list";
return -1;
}
diff --git a/boot/image-fit.c b/boot/image-fit.c
index e7c7212195f..067ad236081 100644
--- a/boot/image-fit.c
+++ b/boot/image-fit.c
@@ -881,7 +881,7 @@ static int fit_image_get_address(const void *fit, int noffset, char *name,
* fit_image_get_load() - get load addr property for given component image node
* @fit: pointer to the FIT format image header
* @noffset: component image node offset
- * @load: pointer to the uint32_t, will hold load address
+ * @load: pointer to the ulong, will hold load address
*
* fit_image_get_load() finds load address property in a given component
* image node. If the property is found, its value is returned to the caller.
@@ -899,7 +899,7 @@ int fit_image_get_load(const void *fit, int noffset, ulong *load)
* fit_image_get_entry() - get entry point address property
* @fit: pointer to the FIT format image header
* @noffset: component image node offset
- * @entry: pointer to the uint32_t, will hold entry point address
+ * @entry: pointer to the ulong, will hold entry point address
*
* This gets the entry point address property for a given component image
* node.
diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig
index e576012b3f6..3a35df830e3 100644
--- a/configs/am64x_evm_a53_defconfig
+++ b/configs/am64x_evm_a53_defconfig
@@ -31,6 +31,7 @@ CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_SYS_PCI_64BIT=y
CONFIG_PCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_BOOTSTD_FULL=y
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index 27a9db72fb5..5c5abd94eb0 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -30,6 +30,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
+CONFIG_SYS_PCI_64BIT=y
CONFIG_PCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_BOOTSTD_FULL=y
diff --git a/configs/j722s_evm_a53_defconfig b/configs/j722s_evm_a53_defconfig
index e84670c75ed..dc4b6b93803 100644
--- a/configs/j722s_evm_a53_defconfig
+++ b/configs/j722s_evm_a53_defconfig
@@ -27,6 +27,7 @@ CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_SYS_PCI_64BIT=y
CONFIG_PCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_BOOTSTD_FULL=y
diff --git a/configs/j784s4_evm_a72_defconfig b/configs/j784s4_evm_a72_defconfig
index f440b18c6fc..1d2043aeba0 100644
--- a/configs/j784s4_evm_a72_defconfig
+++ b/configs/j784s4_evm_a72_defconfig
@@ -28,6 +28,8 @@ CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_SYS_PCI_64BIT=y
+CONFIG_PCI=y
CONFIG_EFI_SET_TIME=y
CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
@@ -56,6 +58,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_MTD=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_OF_CONTROL=y
@@ -123,6 +126,9 @@ CONFIG_MUX_MMIO=y
CONFIG_PHY_TI_DP83867=y
CONFIG_PHY_FIXED=y
CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_NVME_PCI=y
+CONFIG_PCI_CONFIG_HOST_BRIDGE=y
+CONFIG_PCIE_CDNS_TI=y
CONFIG_PCI_ENDPOINT=y
CONFIG_PCIE_CDNS_TI_EP=y
CONFIG_PHY=y
diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst
index 0544929df84..74834f5bd87 100644
--- a/doc/develop/release_cycle.rst
+++ b/doc/develop/release_cycle.rst
@@ -77,7 +77,7 @@ For the next scheduled release, release candidates were made on:
* U-Boot |next_ver|-rc3 was released on Mon 23 February 2026.
-.. * U-Boot |next_ver|-rc4 was released on Mon 09 March 2026.
+* U-Boot |next_ver|-rc4 was released on Mon 09 March 2026.
.. * U-Boot |next_ver|-rc5 was released on Mon 23 March 2026.
diff --git a/doc/usage/fit/signature.rst b/doc/usage/fit/signature.rst
index e5b5a8432e9..da08cc75c3a 100644
--- a/doc/usage/fit/signature.rst
+++ b/doc/usage/fit/signature.rst
@@ -353,20 +353,27 @@ meantime.
Details
-------
The signature node contains a property ('hashed-nodes') which lists all the
-nodes that the signature was made over. The image is walked in order and each
-tag processed as follows:
+nodes that the signature was made over. The signer (mkimage) writes this
+property as a record of what was included in the hash. During verification,
+however, U-Boot does not read 'hashed-nodes'. Instead it rebuilds the node
+list from the configuration's own image references (kernel, fdt, ramdisk,
+etc.), since 'hashed-nodes' is not itself covered by the signature. The
+rebuilt list always includes the root node, the configuration node, each
+referenced image node and its hash/cipher subnodes.
+
+The image is walked in order and each tag processed as follows:
DTB_BEGIN_NODE
The tag and the following name are included in the signature
- if the node or its parent are present in 'hashed-nodes'
+ if the node or its parent are present in the node list
DTB_END_NODE
The tag is included in the signature if the node or its parent
- are present in 'hashed-nodes'
+ are present in the node list
DTB_PROPERTY
The tag, the length word, the offset in the string table, and
- the data are all included if the current node is present in 'hashed-nodes'
+ the data are all included if the current node is present in the node list
and the property name is not 'data'.
DTB_END
@@ -374,7 +381,7 @@ DTB_END
DTB_NOP
The tag is included in the signature if the current node is present
- in 'hashed-nodes'
+ in the node list
In addition, the signature contains a property 'hashed-strings' which contains
the offset and length in the string table of the strings that are to be
diff --git a/drivers/clk/adi/Kconfig b/drivers/clk/adi/Kconfig
index 5745bedf88c..94cf744305f 100644
--- a/drivers/clk/adi/Kconfig
+++ b/drivers/clk/adi/Kconfig
@@ -2,10 +2,7 @@
#
# (C) Copyright 2022 - Analog Devices, Inc.
#
-# Written and/or maintained by Timesys Corporation
-#
-# Contact: Nathan Barrett-Morrison <[email protected]>
-# Contact: Greg Malysa <[email protected]>
+# Written by Timesys Corporation
#
config COMMON_CLK_ADI_SHARED
diff --git a/drivers/clk/adi/Makefile b/drivers/clk/adi/Makefile
index f3f1fd92e5f..b7664fe1da0 100644
--- a/drivers/clk/adi/Makefile
+++ b/drivers/clk/adi/Makefile
@@ -2,10 +2,7 @@
#
# (C) Copyright 2022 - Analog Devices, Inc.
#
-# Written and/or maintained by Timesys Corporation
-#
-# Contact: Nathan Barrett-Morrison <[email protected]>
-# Contact: Greg Malysa <[email protected]>
+# Written by Timesys Corporation
#
obj-$(CONFIG_COMMON_CLK_ADI_SHARED) += clk-shared.o clk-adi-pll.o
diff --git a/drivers/clk/adi/clk-adi-pll.c b/drivers/clk/adi/clk-adi-pll.c
index 372baa9c11b..34818cb1af0 100644
--- a/drivers/clk/adi/clk-adi-pll.c
+++ b/drivers/clk/adi/clk-adi-pll.c
@@ -2,7 +2,7 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Author: Greg Malysa <[email protected]>
*
diff --git a/drivers/clk/adi/clk-adi-sc57x.c b/drivers/clk/adi/clk-adi-sc57x.c
index b17563f0444..3eeb3109bd6 100644
--- a/drivers/clk/adi/clk-adi-sc57x.c
+++ b/drivers/clk/adi/clk-adi-sc57x.c
@@ -2,7 +2,7 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Author: Greg Malysa <[email protected]>
*
diff --git a/drivers/clk/adi/clk-adi-sc58x.c b/drivers/clk/adi/clk-adi-sc58x.c
index 05a0feddec7..776e4748c42 100644
--- a/drivers/clk/adi/clk-adi-sc58x.c
+++ b/drivers/clk/adi/clk-adi-sc58x.c
@@ -2,7 +2,7 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Author: Greg Malysa <[email protected]>
*
diff --git a/drivers/clk/adi/clk-adi-sc594.c b/drivers/clk/adi/clk-adi-sc594.c
index c80bbf9728d..6749c6d0382 100644
--- a/drivers/clk/adi/clk-adi-sc594.c
+++ b/drivers/clk/adi/clk-adi-sc594.c
@@ -2,7 +2,7 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Author: Greg Malysa <[email protected]>
*
diff --git a/drivers/clk/adi/clk-adi-sc598.c b/drivers/clk/adi/clk-adi-sc598.c
index d4a16ac9603..05176f2fa85 100644
--- a/drivers/clk/adi/clk-adi-sc598.c
+++ b/drivers/clk/adi/clk-adi-sc598.c
@@ -2,7 +2,7 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Author: Greg Malysa <[email protected]>
*
diff --git a/drivers/clk/adi/clk-shared.c b/drivers/clk/adi/clk-shared.c
index dcadcafa9d2..afd5f46c845 100644
--- a/drivers/clk/adi/clk-shared.c
+++ b/drivers/clk/adi/clk-shared.c
@@ -2,7 +2,7 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Author: Greg Malysa <[email protected]>
*/
diff --git a/drivers/clk/adi/clk.h b/drivers/clk/adi/clk.h
index f230205c311..acd4e384746 100644
--- a/drivers/clk/adi/clk.h
+++ b/drivers/clk/adi/clk.h
@@ -2,7 +2,7 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Author: Greg Malysa <[email protected]>
*
diff --git a/drivers/dma/adi_dma.c b/drivers/dma/adi_dma.c
index 28afe488db0..9244ba22068 100644
--- a/drivers/dma/adi_dma.c
+++ b/drivers/dma/adi_dma.c
@@ -4,11 +4,8 @@
*
* (C) Copyright 2024 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
- * Contact: Ian Roberts <[email protected]>
*
*/
#include <dm.h>
diff --git a/drivers/gpio/adp5588_gpio.c b/drivers/gpio/adp5588_gpio.c
index 36304e48893..a5b2ccfea17 100644
--- a/drivers/gpio/adp5588_gpio.c
+++ b/drivers/gpio/adp5588_gpio.c
@@ -5,10 +5,8 @@
*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*
* Based on Michael Hennerich's Linux driver:
* Michael Hennerich <[email protected]>
diff --git a/drivers/gpio/gpio-adi-adsp.c b/drivers/gpio/gpio-adi-adsp.c
index 0ce00572e08..af54354fa76 100644
--- a/drivers/gpio/gpio-adi-adsp.c
+++ b/drivers/gpio/gpio-adi-adsp.c
@@ -2,10 +2,9 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Author: Greg Malysa <[email protected]>
- * Additional Contact: Nathan Barrett-Morrison <[email protected]>
*/
#include <dm.h>
diff --git a/drivers/i2c/adi_i2c.c b/drivers/i2c/adi_i2c.c
index 4cddcfa6b7f..c80a1517b5f 100644
--- a/drivers/i2c/adi_i2c.c
+++ b/drivers/i2c/adi_i2c.c
@@ -2,12 +2,10 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Converted to driver model by Nathan Barrett-Morrison
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*/
#include <clk.h>
diff --git a/drivers/mmc/adi_sdhci.c b/drivers/mmc/adi_sdhci.c
index f58897b5218..2bcd16ec3ba 100644
--- a/drivers/mmc/adi_sdhci.c
+++ b/drivers/mmc/adi_sdhci.c
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*
* Based on Rockchip's sdhci.c file
*/
diff --git a/drivers/net/dwc_eth_qos_adi.c b/drivers/net/dwc_eth_qos_adi.c
index fee50a88156..b578225eaad 100644
--- a/drivers/net/dwc_eth_qos_adi.c
+++ b/drivers/net/dwc_eth_qos_adi.c
@@ -2,10 +2,9 @@
/**
* (C) Copyright 2024 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Author: Greg Malysa <[email protected]>
- * Additional Contact: Nathan Barrett-Morrison <[email protected]>
*/
#include <clk.h>
diff --git a/drivers/pci/pcie_cdns_ti.c b/drivers/pci/pcie_cdns_ti.c
index 38804f1c09c..63d249c2506 100644
--- a/drivers/pci/pcie_cdns_ti.c
+++ b/drivers/pci/pcie_cdns_ti.c
@@ -860,6 +860,12 @@ static const struct pcie_cdns_ti_data j722s_pcie_rc_data = {
.max_lanes = 1,
};
+static const struct pcie_cdns_ti_data j784s4_pcie_rc_data = {
+ .mode = PCIE_MODE_RC,
+ .quirk_detect_quiet_flag = true,
+ .max_lanes = 4,
+};
+
static const struct udevice_id pcie_cdns_ti_ids[] = {
{
.compatible = "ti,j7200-pcie-host",
@@ -873,6 +879,10 @@ static const struct udevice_id pcie_cdns_ti_ids[] = {
.compatible = "ti,j722s-pcie-host",
.data = (ulong)&j722s_pcie_rc_data,
},
+ {
+ .compatible = "ti,j784s4-pcie-host",
+ .data = (ulong)&j784s4_pcie_rc_data,
+ },
{},
};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 87729b479bd..09810b62b51 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -282,6 +282,16 @@ config PHY_MTK_TPHY
multi-ports is first version, otherwise is second veriosn,
so you can easily distinguish them by banks layout.
+config PHY_MTK_UFS
+ tristate "MediaTek UFS M-PHY driver"
+ depends on ARCH_MEDIATEK
+ depends on PHY
+ help
+ Support for UFS M-PHY on MediaTek chipsets.
+ Enable this to provide vendor-specific probing,
+ initialization, power on and power off flow of
+ specified M-PHYs.
+
config PHY_NPCM_USB
bool "Nuvoton NPCM USB PHY support"
depends on PHY
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 5a6df0ecfeb..83102349669 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_MT76X8_USB_PHY) += mt76x8-usb-phy.o
obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o
obj-$(CONFIG_PHY_EXYNOS_USBDRD) += phy-exynos-usbdrd.o
obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
+obj-$(CONFIG_PHY_MTK_UFS) += phy-mtk-ufs.o
obj-$(CONFIG_PHY_NPCM_USB) += phy-npcm-usb.o
obj-$(CONFIG_$(PHASE_)PHY_IMX8MQ_USB) += phy-imx8mq-usb.o
obj-$(CONFIG_PHY_IMX8M_PCIE) += phy-imx8m-pcie.o
diff --git a/drivers/phy/phy-mtk-ufs.c b/drivers/phy/phy-mtk-ufs.c
new file mode 100644
index 00000000000..1eda3df858d
--- /dev/null
+++ b/drivers/phy/phy-mtk-ufs.c
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 MediaTek Inc.
+ * Author: Stanley Chu <[email protected]>
+ *
+ * Copyright (c) 2025, Igor Belwon <[email protected]>
+ */
+
+#include "dm/ofnode.h"
+#include "dm/read.h"
+#include <clk.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <dm/device_compat.h>
+#include <dm/devres.h>
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+
+#include <dt-bindings/phy/phy.h>
+
+/* mphy register and offsets */
+#define MP_GLB_DIG_8C 0x008C
+#define FRC_PLL_ISO_EN BIT(8)
+#define PLL_ISO_EN BIT(9)
+#define FRC_FRC_PWR_ON BIT(10)
+#define PLL_PWR_ON BIT(11)
+
+#define MP_LN_DIG_RX_9C 0xA09C
+#define FSM_DIFZ_FRC BIT(18)
+
+#define MP_LN_DIG_RX_AC 0xA0AC
+#define FRC_RX_SQ_EN BIT(0)
+#define RX_SQ_EN BIT(1)
+
+#define MP_LN_RX_44 0xB044
+#define FRC_CDR_PWR_ON BIT(17)
+#define CDR_PWR_ON BIT(18)
+#define FRC_CDR_ISO_EN BIT(19)
+#define CDR_ISO_EN BIT(20)
+
+#define UFSPHY_CLKS_CNT 2
+
+struct mtk_ufs_phy {
+ struct udevice *dev;
+ void __iomem *mmio;
+
+ struct clk *unipro_clk;
+ struct clk *mp_clk;
+};
+
+static void ufs_mtk_phy_set_active(struct mtk_ufs_phy *phy)
+{
+ /* release DA_MP_PLL_PWR_ON */
+ setbits_le32(phy->mmio + MP_GLB_DIG_8C, PLL_PWR_ON);
+ clrbits_le32(phy->mmio + MP_GLB_DIG_8C, FRC_FRC_PWR_ON);
+
+ /* release DA_MP_PLL_ISO_EN */
+ clrbits_le32(phy->mmio + MP_GLB_DIG_8C, PLL_ISO_EN);
+ clrbits_le32(phy->mmio + MP_GLB_DIG_8C, FRC_PLL_ISO_EN);
+
+ /* release DA_MP_CDR_PWR_ON */
+ setbits_le32(phy->mmio + MP_LN_RX_44, CDR_PWR_ON);
+ clrbits_le32(phy->mmio + MP_LN_RX_44, FRC_CDR_PWR_ON);
+
+ /* release DA_MP_CDR_ISO_EN */
+ clrbits_le32(phy->mmio + MP_LN_RX_44, CDR_ISO_EN);
+ clrbits_le32(phy->mmio + MP_LN_RX_44, FRC_CDR_ISO_EN);
+
+ /* release DA_MP_RX0_SQ_EN */
+ setbits_le32(phy->mmio + MP_LN_DIG_RX_AC, RX_SQ_EN);
+ clrbits_le32(phy->mmio + MP_LN_DIG_RX_AC, FRC_RX_SQ_EN);
+
+ /* delay 1us to wait DIFZ stable */
+ udelay(1);
+
+ /* release DIFZ */
+ clrbits_le32(phy->mmio + MP_LN_DIG_RX_9C, FSM_DIFZ_FRC);
+}
+
+static int mtk_phy_power_on(struct phy *phy)
+{
+ struct mtk_ufs_phy *ufs_phy = dev_get_priv(phy->dev);
+ int ret;
+
+ ret = clk_enable(ufs_phy->mp_clk);
+ if (ret < 0) {
+ dev_err(phy->dev, "failed to enable mp_clk\n");
+ return ret;
+ }
+
+ ret = clk_enable(ufs_phy->unipro_clk);
+ if (ret < 0) {
+ dev_err(phy->dev, "failed to enable unipro_clk %d\n", ret);
+ clk_disable(ufs_phy->unipro_clk);
+ return ret;
+ }
+
+ ufs_mtk_phy_set_active(ufs_phy);
+
+ return 0;
+}
+
+static int mtk_phy_power_off(struct phy *phy)
+{
+ struct mtk_ufs_phy *ufs_phy = dev_get_priv(phy->dev);
+
+ /* Set PHY to Deep Hibernate mode */
+ setbits_le32(ufs_phy->mmio + MP_LN_DIG_RX_9C, FSM_DIFZ_FRC);
+
+ /* force DA_MP_RX0_SQ_EN */
+ setbits_le32(ufs_phy->mmio + MP_LN_DIG_RX_AC, FRC_RX_SQ_EN);
+ clrbits_le32(ufs_phy->mmio + MP_LN_DIG_RX_AC, RX_SQ_EN);
+
+ /* force DA_MP_CDR_ISO_EN */
+ setbits_le32(ufs_phy->mmio + MP_LN_RX_44, FRC_CDR_ISO_EN);
+ setbits_le32(ufs_phy->mmio + MP_LN_RX_44, CDR_ISO_EN);
+
+ /* force DA_MP_CDR_PWR_ON */
+ setbits_le32(ufs_phy->mmio + MP_LN_RX_44, FRC_CDR_PWR_ON);
+ clrbits_le32(ufs_phy->mmio + MP_LN_RX_44, CDR_PWR_ON);
+
+ /* force DA_MP_PLL_ISO_EN */
+ setbits_le32(ufs_phy->mmio + MP_GLB_DIG_8C, FRC_PLL_ISO_EN);
+ setbits_le32(ufs_phy->mmio + MP_GLB_DIG_8C, PLL_ISO_EN);
+
+ /* force DA_MP_PLL_PWR_ON */
+ setbits_le32(ufs_phy->mmio + MP_GLB_DIG_8C, FRC_FRC_PWR_ON);
+ clrbits_le32(ufs_phy->mmio + MP_GLB_DIG_8C, PLL_PWR_ON);
+
+ return 0;
+}
+
+static const struct phy_ops mtk_ufs_phy_ops = {
+ .power_on = mtk_phy_power_on,
+ .power_off = mtk_phy_power_off,
+};
+
+static int mtk_ufs_phy_probe(struct udevice *dev)
+{
+ struct mtk_ufs_phy *phy = dev_get_priv(dev);
+ fdt_addr_t addr;
+ int ret;
+
+ phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
+ if (!phy)
+ return -ENOMEM;
+
+ addr = dev_read_addr(dev);
+ if (addr == FDT_ADDR_T_NONE)
+ return -ENOMEM;
+
+ phy->dev = dev;
+ phy->mmio = map_sysmem(addr, 0);
+
+ phy->mp_clk = devm_clk_get(dev, "mp");
+ if (IS_ERR(phy->mp_clk)) {
+ ret = PTR_ERR(phy->mp_clk);
+ dev_err(dev, "Failed to get mp clock (ret=%d)\n", ret);
+ return ret;
+ }
+
+ phy->unipro_clk = devm_clk_get(dev, "unipro");
+ if (IS_ERR(phy->unipro_clk)) {
+ ret = PTR_ERR(phy->unipro_clk);
+ dev_err(dev, "Failed to get unipro clock (ret=%d)\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id mtk_ufs_phy_id_table[] = {
+ {.compatible = "mediatek,mt8183-ufsphy"},
+ {},
+};
+
+U_BOOT_DRIVER(mtk_ufs_phy) = {
+ .name = "mtk-ufs_phy",
+ .id = UCLASS_PHY,
+ .of_match = mtk_ufs_phy_id_table,
+ .ops = &mtk_ufs_phy_ops,
+ .probe = mtk_ufs_phy_probe,
+ .priv_auto = sizeof(struct mtk_ufs_phy),
+};
diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
index 4ecc8bac645..90eee88eb13 100644
--- a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
+++ b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
@@ -30,6 +30,11 @@ struct bcm283x_pinctrl_priv {
#define MAX_PINS_PER_BANK 16
+/* pull states for BCM2711 */
+#define BCM2711_PULL_NONE 0
+#define BCM2711_PULL_UP 1
+#define BCM2711_PULL_DOWN 2
+
static void bcm2835_gpio_set_func_id(struct udevice *dev, unsigned int gpio,
int func)
{
@@ -93,6 +98,17 @@ static void bcm2711_gpio_set_pull(struct udevice *dev, unsigned int gpio, int pu
u32 bit_shift;
u32 pull_bits;
+ if (!device_is_compatible(dev, "brcm,bcm2711-gpio"))
+ return;
+
+ /* BCM2711's pull values differ from BCM2835 */
+ if (pull == BCM2835_PUD_UP)
+ pull = BCM2711_PULL_UP;
+ else if (pull == BCM2835_PUD_DOWN)
+ pull = BCM2711_PULL_DOWN;
+ else
+ pull = BCM2711_PULL_NONE;
+
/* Findout which GPIO_PUP_PDN_CNTRL register to use */
reg_offset = BCM2711_GPPUD_CNTRL_REG0 + BCM2711_PUD_REG_OFFSET(gpio);
diff --git a/drivers/pinctrl/pinctrl-adi-adsp.c b/drivers/pinctrl/pinctrl-adi-adsp.c
index debf434212d..e39f88c8b26 100644
--- a/drivers/pinctrl/pinctrl-adi-adsp.c
+++ b/drivers/pinctrl/pinctrl-adi-adsp.c
@@ -2,10 +2,9 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Author: Greg Malysa <[email protected]>
- * Additional Contact: Nathan Barrett-Morrison <[email protected]>
*
* dm pinctrl implementation for ADI ADSP SoCs
*
diff --git a/drivers/remoteproc/adi_sc5xx_rproc.c b/drivers/remoteproc/adi_sc5xx_rproc.c
index 86acd1b98c7..b96603263a5 100644
--- a/drivers/remoteproc/adi_sc5xx_rproc.c
+++ b/drivers/remoteproc/adi_sc5xx_rproc.c
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*
* Analog Devices SC5xx remoteproc driver for loading code onto SHARC cores
*/
diff --git a/drivers/serial/serial_adi_uart4.c b/drivers/serial/serial_adi_uart4.c
index 45f8315d0a0..24b2071d705 100644
--- a/drivers/serial/serial_adi_uart4.c
+++ b/drivers/serial/serial_adi_uart4.c
@@ -2,12 +2,10 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Converted to driver model by Nathan Barrett-Morrison
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*
*/
diff --git a/drivers/spi/adi_spi3.c b/drivers/spi/adi_spi3.c
index 2125d25561a..bc66dfbfdd6 100644
--- a/drivers/spi/adi_spi3.c
+++ b/drivers/spi/adi_spi3.c
@@ -2,14 +2,10 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Converted to driver model by Nathan Barrett-Morrison
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
- * Contact: Ian Roberts <[email protected]>
- * Contact: Piotr Wojtaszczyk <[email protected]>
*
*/
diff --git a/drivers/timer/adi_sc5xx_timer.c b/drivers/timer/adi_sc5xx_timer.c
index 11c098434a8..d9aef3da11e 100644
--- a/drivers/timer/adi_sc5xx_timer.c
+++ b/drivers/timer/adi_sc5xx_timer.c
@@ -2,12 +2,11 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Converted to driver model by Nathan Barrett-Morrison
*
* Author: Greg Malysa <[email protected]>
- * Additional Contact: Nathan Barrett-Morrison <[email protected]>
*
* dm timer implementation for ADI ADSP-SC5xx SoCs
*
diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c
index 87d9c5bad79..40883a187b0 100644
--- a/drivers/ufs/cdns-platform.c
+++ b/drivers/ufs/cdns-platform.c
@@ -7,7 +7,6 @@
#include <clk.h>
#include <dm.h>
-#include <ufs.h>
#include <asm/io.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/ufs/ufs-amd-versal2.c b/drivers/ufs/ufs-amd-versal2.c
index dd62c9819ba..6c949b2ca76 100644
--- a/drivers/ufs/ufs-amd-versal2.c
+++ b/drivers/ufs/ufs-amd-versal2.c
@@ -5,7 +5,6 @@
#include <clk.h>
#include <dm.h>
-#include <ufs.h>
#include <asm/io.h>
#include <dm/device_compat.h>
#include <zynqmp_firmware.h>
diff --git a/drivers/ufs/ufs-pci.c b/drivers/ufs/ufs-pci.c
index 5b9c72a695d..e1e010d027c 100644
--- a/drivers/ufs/ufs-pci.c
+++ b/drivers/ufs/ufs-pci.c
@@ -7,7 +7,6 @@
#include <dm.h>
#include <errno.h>
#include <pci.h>
-#include <ufs.h>
#include <dm/device_compat.h>
#include "ufs.h"
diff --git a/drivers/ufs/ufs-qcom.c b/drivers/ufs/ufs-qcom.c
index ee43958d5d8..dc40ee62daf 100644
--- a/drivers/ufs/ufs-qcom.c
+++ b/drivers/ufs/ufs-qcom.c
@@ -14,7 +14,6 @@
#include <dm.h>
#include <dm/device_compat.h>
#include <generic-phy.h>
-#include <ufs.h>
#include <asm/gpio.h>
#include <interconnect.h>
diff --git a/drivers/ufs/ufs-renesas-rcar-gen5.c b/drivers/ufs/ufs-renesas-rcar-gen5.c
index cc53e91449c..a21ae3f390e 100644
--- a/drivers/ufs/ufs-renesas-rcar-gen5.c
+++ b/drivers/ufs/ufs-renesas-rcar-gen5.c
@@ -7,7 +7,6 @@
#include <clk.h>
#include <dm.h>
-#include <ufs.h>
#include <asm/io.h>
#include <dm/device_compat.h>
#include <linux/iopoll.h>
diff --git a/drivers/ufs/ufs-renesas.c b/drivers/ufs/ufs-renesas.c
index 5652309911e..a206e3c6d58 100644
--- a/drivers/ufs/ufs-renesas.c
+++ b/drivers/ufs/ufs-renesas.c
@@ -7,7 +7,6 @@
#include <clk.h>
#include <dm.h>
-#include <ufs.h>
#include <asm/io.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/ufs/ufs-rockchip.c b/drivers/ufs/ufs-rockchip.c
index 0384244387d..643a6ffb9bc 100644
--- a/drivers/ufs/ufs-rockchip.c
+++ b/drivers/ufs/ufs-rockchip.c
@@ -13,7 +13,6 @@
#include <linux/err.h>
#include <linux/ioport.h>
#include <reset.h>
-#include <ufs.h>
#include "ufs.h"
#include "unipro.h"
diff --git a/drivers/ufs/ufs-uclass.c b/drivers/ufs/ufs-uclass.c
index 3c8e4299259..7a80a9d5664 100644
--- a/drivers/ufs/ufs-uclass.c
+++ b/drivers/ufs/ufs-uclass.c
@@ -917,11 +917,13 @@ static int ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
enabled_intr_status = intr_status & hba->intr_mask;
ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
- if (get_timer(start) > QUERY_REQ_TIMEOUT) {
- dev_err(hba->dev,
- "Timedout waiting for UTP response\n");
-
- return -ETIMEDOUT;
+ if (hba->max_pwr_info.info.pwr_rx != SLOWAUTO_MODE &&
+ hba->max_pwr_info.info.pwr_tx != SLOWAUTO_MODE) {
+ if (get_timer(start) > QUERY_REQ_TIMEOUT) {
+ dev_err(hba->dev,
+ "Timedout waiting for UTP response\n");
+ return -ETIMEDOUT;
+ }
}
if (enabled_intr_status & UFSHCD_ERROR_MASK) {
diff --git a/drivers/ufs/ufshcd-dwc.c b/drivers/ufs/ufshcd-dwc.c
index 3f62e59a060..98422d742a0 100644
--- a/drivers/ufs/ufshcd-dwc.c
+++ b/drivers/ufs/ufshcd-dwc.c
@@ -7,7 +7,6 @@
*/
#include <clk.h>
#include <dm.h>
-#include <ufs.h>
#include <asm/io.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/usb/musb-new/sc5xx.c b/drivers/usb/musb-new/sc5xx.c
index 16201480b43..991846818a2 100644
--- a/drivers/usb/musb-new/sc5xx.c
+++ b/drivers/usb/musb-new/sc5xx.c
@@ -4,7 +4,7 @@
*
* ADI SC5XX MUSB "glue layer"
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Loosely ported from Linux driver:
* Author: Nathan Barrett-Morrison <[email protected]>
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
index 438ed41e8d5..65a91f5cff7 100644
--- a/drivers/video/stm32/stm32_dsi.c
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -84,42 +84,48 @@ enum dsi_color {
/* Timeout for regulator on/off, pll lock/unlock & fifo empty */
#define TIMEOUT_US 200000
-struct stm32_dsi_priv {
+struct stm32_dsi_plat {
struct mipi_dsi_device device;
void __iomem *base;
struct udevice *panel;
+ struct udevice *vdd_reg;
+ struct udevice *dsi_host;
+ struct reset_ctl rst;
+ struct clk pclk;
+ struct clk refclk;
+};
+
+struct stm32_dsi_priv {
u32 pllref_clk;
u32 hw_version;
int lane_min_kbps;
int lane_max_kbps;
- struct udevice *vdd_reg;
- struct udevice *dsi_host;
};
-static inline void dsi_write(struct stm32_dsi_priv *dsi, u32 reg, u32 val)
+static inline void dsi_write(void __iomem *base, u32 reg, u32 val)
{
- writel(val, dsi->base + reg);
+ writel(val, base + reg);
}
-static inline u32 dsi_read(struct stm32_dsi_priv *dsi, u32 reg)
+static inline u32 dsi_read(void __iomem *base, u32 reg)
{
- return readl(dsi->base + reg);
+ return readl(base + reg);
}
-static inline void dsi_set(struct stm32_dsi_priv *dsi, u32 reg, u32 mask)
+static inline void dsi_set(void __iomem *base, u32 reg, u32 mask)
{
- dsi_write(dsi, reg, dsi_read(dsi, reg) | mask);
+ dsi_write(base, reg, dsi_read(base, reg) | mask);
}
-static inline void dsi_clear(struct stm32_dsi_priv *dsi, u32 reg, u32 mask)
+static inline void dsi_clear(void __iomem *base, u32 reg, u32 mask)
{
- dsi_write(dsi, reg, dsi_read(dsi, reg) & ~mask);
+ dsi_write(base, reg, dsi_read(base, reg) & ~mask);
}
-static inline void dsi_update_bits(struct stm32_dsi_priv *dsi, u32 reg,
+static inline void dsi_update_bits(void __iomem *base, u32 reg,
u32 mask, u32 val)
{
- dsi_write(dsi, reg, (dsi_read(dsi, reg) & ~mask) | val);
+ dsi_write(base, reg, (dsi_read(base, reg) & ~mask) | val);
}
static enum dsi_color dsi_color_from_mipi(u32 fmt)
@@ -210,14 +216,14 @@ static int dsi_phy_init(void *priv_data)
{
struct mipi_dsi_device *device = priv_data;
struct udevice *dev = device->dev;
- struct stm32_dsi_priv *dsi = dev_get_priv(dev);
+ struct stm32_dsi_plat *dsi = dev_get_plat(dev);
u32 val;
int ret;
dev_dbg(dev, "Initialize DSI physical layer\n");
/* Enable the regulator */
- dsi_set(dsi, DSI_WRPCR, WRPCR_REGEN | WRPCR_BGREN);
+ dsi_set(dsi->base, DSI_WRPCR, WRPCR_REGEN | WRPCR_BGREN);
ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_RRS,
TIMEOUT_US);
if (ret) {
@@ -226,7 +232,7 @@ static int dsi_phy_init(void *priv_data)
}
/* Enable the DSI PLL & wait for its lock */
- dsi_set(dsi, DSI_WRPCR, WRPCR_PLLEN);
+ dsi_set(dsi->base, DSI_WRPCR, WRPCR_PLLEN);
ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_PLLLS,
TIMEOUT_US);
if (ret) {
@@ -241,7 +247,7 @@ static void dsi_phy_post_set_mode(void *priv_data, unsigned long mode_flags)
{
struct mipi_dsi_device *device = priv_data;
struct udevice *dev = device->dev;
- struct stm32_dsi_priv *dsi = dev_get_priv(dev);
+ struct stm32_dsi_plat *dsi = dev_get_plat(dev);
dev_dbg(dev, "Set mode %p enable %ld\n", dsi,
mode_flags & MIPI_DSI_MODE_VIDEO);
@@ -256,9 +262,9 @@ static void dsi_phy_post_set_mode(void *priv_data, unsigned long mode_flags)
*/
if (mode_flags & MIPI_DSI_MODE_VIDEO)
- dsi_set(dsi, DSI_WCR, WCR_DSIEN);
+ dsi_set(dsi->base, DSI_WCR, WCR_DSIEN);
else
- dsi_clear(dsi, DSI_WCR, WCR_DSIEN);
+ dsi_clear(dsi->base, DSI_WCR, WCR_DSIEN);
}
static int dsi_get_lane_mbps(void *priv_data, struct display_timing *timings,
@@ -266,32 +272,33 @@ static int dsi_get_lane_mbps(void *priv_data, struct display_timing *timings,
{
struct mipi_dsi_device *device = priv_data;
struct udevice *dev = device->dev;
- struct stm32_dsi_priv *dsi = dev_get_priv(dev);
+ struct stm32_dsi_plat *plat = dev_get_plat(dev);
+ struct stm32_dsi_priv *priv = dev_get_priv(dev);
int idf, ndiv, odf, pll_in_khz, pll_out_khz;
int ret, bpp;
u32 val;
/* Update lane capabilities according to hw version */
- dsi->lane_min_kbps = LANE_MIN_KBPS;
- dsi->lane_max_kbps = LANE_MAX_KBPS;
- if (dsi->hw_version == HWVER_131) {
- dsi->lane_min_kbps *= 2;
- dsi->lane_max_kbps *= 2;
+ priv->lane_min_kbps = LANE_MIN_KBPS;
+ priv->lane_max_kbps = LANE_MAX_KBPS;
+ if (priv->hw_version == HWVER_131) {
+ priv->lane_min_kbps *= 2;
+ priv->lane_max_kbps *= 2;
}
- pll_in_khz = dsi->pllref_clk / 1000;
+ pll_in_khz = priv->pllref_clk / 1000;
/* Compute requested pll out */
bpp = mipi_dsi_pixel_format_to_bpp(format);
pll_out_khz = (timings->pixelclock.typ / 1000) * bpp / lanes;
/* Add 20% to pll out to be higher than pixel bw (burst mode only) */
pll_out_khz = (pll_out_khz * 12) / 10;
- if (pll_out_khz > dsi->lane_max_kbps) {
- pll_out_khz = dsi->lane_max_kbps;
+ if (pll_out_khz > priv->lane_max_kbps) {
+ pll_out_khz = priv->lane_max_kbps;
dev_warn(dev, "Warning max phy mbps is used\n");
}
- if (pll_out_khz < dsi->lane_min_kbps) {
- pll_out_khz = dsi->lane_min_kbps;
+ if (pll_out_khz < priv->lane_min_kbps) {
+ pll_out_khz = priv->lane_min_kbps;
dev_warn(dev, "Warning min phy mbps is used\n");
}
@@ -299,7 +306,7 @@ static int dsi_get_lane_mbps(void *priv_data, struct display_timing *timings,
idf = 0;
ndiv = 0;
odf = 0;
- ret = dsi_pll_get_params(dsi, pll_in_khz, pll_out_khz,
+ ret = dsi_pll_get_params(priv, pll_in_khz, pll_out_khz,
&idf, &ndiv, &odf);
if (ret) {
dev_err(dev, "Warning dsi_pll_get_params(): bad params\n");
@@ -310,18 +317,18 @@ static int dsi_get_lane_mbps(void *priv_data, struct display_timing *timings,
pll_out_khz = dsi_pll_get_clkout_khz(pll_in_khz, idf, ndiv, odf);
/* Set the PLL division factors */
- dsi_update_bits(dsi, DSI_WRPCR, WRPCR_NDIV | WRPCR_IDF | WRPCR_ODF,
+ dsi_update_bits(plat->base, DSI_WRPCR, WRPCR_NDIV | WRPCR_IDF | WRPCR_ODF,
(ndiv << 2) | (idf << 11) | ((ffs(odf) - 1) << 16));
/* Compute uix4 & set the bit period in high-speed mode */
val = 4000000 / pll_out_khz;
- dsi_update_bits(dsi, DSI_WPCR0, WPCR0_UIX4, val);
+ dsi_update_bits(plat->base, DSI_WPCR0, WPCR0_UIX4, val);
/* Select video mode by resetting DSIM bit */
- dsi_clear(dsi, DSI_WCFGR, WCFGR_DSIM);
+ dsi_clear(plat->base, DSI_WCFGR, WCFGR_DSIM);
/* Select the color coding */
- dsi_update_bits(dsi, DSI_WCFGR, WCFGR_COLMUX,
+ dsi_update_bits(plat->base, DSI_WCFGR, WCFGR_COLMUX,
dsi_color_from_mipi(format) << 1);
*lane_mbps = pll_out_khz / 1000;
@@ -340,27 +347,27 @@ static const struct mipi_dsi_phy_ops dsi_stm_phy_ops = {
static int stm32_dsi_attach(struct udevice *dev)
{
- struct stm32_dsi_priv *priv = dev_get_priv(dev);
- struct mipi_dsi_device *device = &priv->device;
+ struct stm32_dsi_plat *plat = dev_get_plat(dev);
+ struct mipi_dsi_device *device = &plat->device;
struct mipi_dsi_panel_plat *mplat;
struct display_timing timings;
int ret;
- ret = uclass_first_device_err(UCLASS_PANEL, &priv->panel);
+ ret = uclass_first_device_err(UCLASS_PANEL, &plat->panel);
if (ret) {
dev_err(dev, "panel device error %d\n", ret);
return ret;
}
- mplat = dev_get_plat(priv->panel);
- mplat->device = &priv->device;
+ mplat = dev_get_plat(plat->panel);
+ mplat->device = &plat->device;
device->lanes = mplat->lanes;
device->format = mplat->format;
device->mode_flags = mplat->mode_flags;
- ret = panel_get_display_timing(priv->panel, &timings);
+ ret = panel_get_display_timing(plat->panel, &timings);
if (ret) {
- ret = ofnode_decode_display_timing(dev_ofnode(priv->panel),
+ ret = ofnode_decode_display_timing(dev_ofnode(plat->panel),
0, &timings);
if (ret) {
dev_err(dev, "decode display timing error %d\n", ret);
@@ -368,13 +375,13 @@ static int stm32_dsi_attach(struct udevice *dev)
}
}
- ret = uclass_get_device(UCLASS_DSI_HOST, 0, &priv->dsi_host);
+ ret = uclass_get_device(UCLASS_DSI_HOST, 0, &plat->dsi_host);
if (ret) {
dev_err(dev, "No video dsi host detected %d\n", ret);
return ret;
}
- ret = dsi_host_init(priv->dsi_host, device, &timings, 2,
+ ret = dsi_host_init(plat->dsi_host, device, &timings, 2,
&dsi_stm_phy_ops);
if (ret) {
dev_err(dev, "failed to initialize mipi dsi host\n");
@@ -386,17 +393,17 @@ static int stm32_dsi_attach(struct udevice *dev)
static int stm32_dsi_set_backlight(struct udevice *dev, int percent)
{
- struct stm32_dsi_priv *priv = dev_get_priv(dev);
+ struct stm32_dsi_plat *plat = dev_get_plat(dev);
int ret;
- ret = panel_enable_backlight(priv->panel);
+ ret = panel_enable_backlight(plat->panel);
if (ret) {
dev_err(dev, "panel %s enable backlight error %d\n",
- priv->panel->name, ret);
+ plat->panel->name, ret);
return ret;
}
- ret = dsi_host_enable(priv->dsi_host);
+ ret = dsi_host_enable(plat->dsi_host);
if (ret) {
dev_err(dev, "failed to enable mipi dsi host\n");
return ret;
@@ -417,66 +424,71 @@ static int stm32_dsi_bind(struct udevice *dev)
return dm_scan_fdt_dev(dev);
}
-static int stm32_dsi_probe(struct udevice *dev)
+static int stm32_dsi_of_to_plat(struct udevice *dev)
{
- struct stm32_dsi_priv *priv = dev_get_priv(dev);
- struct mipi_dsi_device *device = &priv->device;
- struct reset_ctl rst;
- struct clk clk;
+ struct stm32_dsi_plat *plat = dev_get_plat(dev);
+ struct mipi_dsi_device *device = &plat->device;
int ret;
device->dev = dev;
- priv->base = dev_read_addr_ptr(dev);
- if (!priv->base) {
+ plat->base = dev_read_addr_ptr(dev);
+ if (!plat->base) {
dev_err(dev, "dsi dt register address error\n");
return -EINVAL;
}
ret = device_get_supply_regulator(dev, "phy-dsi-supply",
- &priv->vdd_reg);
+ &plat->vdd_reg);
if (ret && ret != -ENOENT) {
dev_err(dev, "Warning: cannot get phy dsi supply\n");
return -ENODEV;
}
if (ret != -ENOENT) {
- ret = regulator_set_enable(priv->vdd_reg, true);
+ ret = regulator_set_enable(plat->vdd_reg, true);
if (ret)
return ret;
}
- ret = clk_get_by_name(device->dev, "pclk", &clk);
+ ret = clk_get_by_name(device->dev, "pclk", &plat->pclk);
if (ret) {
dev_err(dev, "peripheral clock get error %d\n", ret);
- goto err_reg;
- }
-
- ret = clk_enable(&clk);
- if (ret) {
- dev_err(dev, "peripheral clock enable error %d\n", ret);
- goto err_reg;
+ return ret;
}
- ret = clk_get_by_name(dev, "ref", &clk);
+ ret = clk_get_by_name(dev, "ref", &plat->refclk);
if (ret) {
dev_err(dev, "pll reference clock get error %d\n", ret);
- goto err_clk;
+ return ret;
}
- priv->pllref_clk = (unsigned int)clk_get_rate(&clk);
+ ret = reset_get_by_index(device->dev, 0, &plat->rst);
+ if (ret)
+ dev_err(dev, "missing dsi hardware reset\n");
+
+ return ret;
+}
- ret = reset_get_by_index(device->dev, 0, &rst);
+static int stm32_dsi_probe(struct udevice *dev)
+{
+ struct stm32_dsi_plat *plat = dev_get_plat(dev);
+ struct stm32_dsi_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = clk_enable(&plat->pclk);
if (ret) {
- dev_err(dev, "missing dsi hardware reset\n");
- goto err_clk;
+ dev_err(dev, "peripheral clock enable error %d\n", ret);
+ goto err_reg;
}
+ priv->pllref_clk = (unsigned int)clk_get_rate(&plat->refclk);
+
/* Reset */
- reset_deassert(&rst);
+ reset_deassert(&plat->rst);
/* check hardware version */
- priv->hw_version = dsi_read(priv, DSI_VERSION) & VERSION;
+ priv->hw_version = dsi_read(plat->base, DSI_VERSION) & VERSION;
if (priv->hw_version != HWVER_130 &&
priv->hw_version != HWVER_131) {
dev_err(dev, "DSI version 0x%x not supported\n", priv->hw_version);
@@ -489,9 +501,9 @@ static int stm32_dsi_probe(struct udevice *dev)
return 0;
err_clk:
- clk_disable(&clk);
+ clk_disable(&plat->pclk);
err_reg:
- regulator_set_enable(priv->vdd_reg, false);
+ regulator_set_enable(plat->vdd_reg, false);
return ret;
}
@@ -512,6 +524,8 @@ U_BOOT_DRIVER(stm32_dsi) = {
.of_match = stm32_dsi_ids,
.bind = stm32_dsi_bind,
.probe = stm32_dsi_probe,
+ .of_to_plat = stm32_dsi_of_to_plat,
.ops = &stm32_dsi_ops,
+ .plat_auto = sizeof(struct stm32_dsi_plat),
.priv_auto = sizeof(struct stm32_dsi_priv),
};
diff --git a/drivers/watchdog/adi_wdt.c b/drivers/watchdog/adi_wdt.c
index 6f5b3d5d042..7d7cf98b55e 100644
--- a/drivers/watchdog/adi_wdt.c
+++ b/drivers/watchdog/adi_wdt.c
@@ -2,12 +2,10 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
* Converted to driver model by Nathan Barrett-Morrison
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*
* adi_wtd.c - driver for ADI on-chip watchdog
*
diff --git a/include/dt-bindings/clock/adi-sc5xx-clock.h b/include/dt-bindings/clock/adi-sc5xx-clock.h
index 4a5373d1141..94ab225d3b7 100644
--- a/include/dt-bindings/clock/adi-sc5xx-clock.h
+++ b/include/dt-bindings/clock/adi-sc5xx-clock.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*
*/
diff --git a/include/dt-bindings/pinctrl/adi-adsp.h b/include/dt-bindings/pinctrl/adi-adsp.h
index 7dc8a1ef5c4..afe68e836e7 100644
--- a/include/dt-bindings/pinctrl/adi-adsp.h
+++ b/include/dt-bindings/pinctrl/adi-adsp.h
@@ -2,10 +2,8 @@
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
- * Written and/or maintained by Timesys Corporation
+ * Written by Timesys Corporation
*
- * Contact: Nathan Barrett-Morrison <[email protected]>
- * Contact: Greg Malysa <[email protected]>
*
*/
diff --git a/include/ufs.h b/include/ufs.h
index 702b8359dbd..f6e27d90e43 100644
--- a/include/ufs.h
+++ b/include/ufs.h
@@ -20,13 +20,4 @@ int ufs_probe(void);
*/
int ufs_probe_dev(int index);
-/*
- * ufs_scsi_bind() - Create a new scsi device as a child of the UFS device and
- * bind it to the ufs_scsi driver
- * @ufs_dev: UFS device
- * @scsi_devp: Pointer to scsi device
- *
- * Return: 0 if Ok, -ve on error
- */
-int ufs_scsi_bind(struct udevice *ufs_dev, struct udevice **scsi_devp);
#endif
diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py
index 7a7f9c379de..19f3f981379 100644
--- a/test/py/tests/test_vboot.py
+++ b/test/py/tests/test_vboot.py
@@ -362,10 +362,14 @@ def test_vboot(ubman, name, sha_algo, padding, sign_options, required,
shutil.copyfile(fit, efit)
vboot_evil.add_evil_node(fit, efit, evil_kernel, 'kernel@')
- msg = 'Signature checking prevents use of unit addresses (@) in nodes'
+ # fit_check_sign catches this via signature mismatch (the @
+ # node is hashed instead of the real one)
utils.run_and_log_expect_exception(
ubman, [fit_check_sign, '-f', efit, '-k', dtb],
- 1, msg)
+ 1, 'Failed to verify required signature')
+
+ # bootm catches it earlier, at fit_check_format() time
+ msg = 'Signature checking prevents use of unit addresses (@) in nodes'
run_bootm(sha_algo, 'evil kernel@', msg, False, efit)
# Create a new properly signed fit and replace header bytes
diff --git a/tools/Makefile b/tools/Makefile
index 0ac683ac3ec..5d8e8f349e1 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -356,7 +356,7 @@ override HOSTCFLAGS = $(CFLAGS)
quiet_cmd_crosstools_strip = STRIP $^
cmd_crosstools_strip = $(STRIP) $^; touch $@
-$(obj)/.strip: $(call objectify,$(filter $(hostprogs-always-y)))
+$(obj)/.strip: $(call objectify,$(hostprogs-always-y))
$(call cmd,crosstools_strip)
always-y += .strip
diff --git a/tools/atmelimage.c b/tools/atmelimage.c
index 6a2d9d8feab..770f7a0de4e 100644
--- a/tools/atmelimage.c
+++ b/tools/atmelimage.c
@@ -55,7 +55,7 @@ static const char * const configs[] = {
static int atmel_find_pmecc_parameter_in_token(const char *token)
{
size_t pos;
- char *param;
+ const char *param;
debug("token: '%s'\n", token);