diff options
Diffstat (limited to 'arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi')
| -rw-r--r-- | arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi | 221 |
1 files changed, 1 insertions, 220 deletions
diff --git a/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi b/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi index 646b617949d..b80ce20e942 100644 --- a/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi +++ b/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi @@ -9,6 +9,7 @@ */ #include "imx93-u-boot.dtsi" +#include "imx91-93-phyboard-segin-common-u-boot.dtsi" / { /* @@ -17,224 +18,4 @@ * periphery. */ model = "PHYTEC phyCORE-i.MX93"; - - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&wdog3>; - bootph-pre-ram; - bootph-some-ram; - }; - - aliases { - ethernet0 = &fec; - ethernet1 = &eqos; - }; - - bootstd { - bootph-verify; - compatible = "u-boot,boot-std"; - - filename-prefixes = "/", "/boot/"; - bootdev-order = "mmc0", "mmc1", "ethernet"; - - rauc { - compatible = "u-boot,distro-rauc"; - }; - - script { - compatible = "u-boot,script"; - }; - }; - - firmware { - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; -}; - -&{/soc@0} { - bootph-all; - bootph-pre-ram; -}; - -&aips1 { - bootph-pre-ram; - bootph-all; -}; - -&aips2 { - bootph-pre-ram; - bootph-some-ram; -}; - -&aips3 { - bootph-pre-ram; - bootph-some-ram; -}; - -&iomuxc { - bootph-pre-ram; - bootph-some-ram; -}; - -®_usdhc2_vmmc { - u-boot,off-on-delay-us = <20000>; - bootph-pre-ram; - bootph-some-ram; -}; - -&pinctrl_lpi2c3 { - bootph-pre-ram; - bootph-some-ram; -}; - -&pinctrl_pmic { - bootph-pre-ram; - bootph-some-ram; -}; - -&pinctrl_reg_usdhc2_vmmc { - bootph-pre-ram; -}; - -&pinctrl_uart1 { - bootph-pre-ram; - bootph-some-ram; -}; - -&pinctrl_usdhc1 { - bootph-pre-ram; - bootph-some-ram; -}; - -&pinctrl_usdhc1_100mhz { - bootph-pre-ram; - bootph-some-ram; -}; - -&pinctrl_usdhc1_200mhz { - bootph-pre-ram; - bootph-some-ram; -}; - -&pinctrl_usdhc2_cd { - bootph-pre-ram; - bootph-some-ram; -}; - -&pinctrl_usdhc2_default { - bootph-pre-ram; - bootph-some-ram; -}; - -&pinctrl_usdhc2_100mhz { - bootph-pre-ram; - bootph-some-ram; -}; - -&pinctrl_usdhc2_200mhz { - bootph-pre-ram; - bootph-some-ram; -}; - -&gpio1 { - bootph-pre-ram; - bootph-some-ram; -}; - -&gpio2 { - bootph-pre-ram; - bootph-some-ram; -}; - -&gpio3 { - bootph-pre-ram; - bootph-some-ram; -}; - -&gpio4 { - bootph-pre-ram; - bootph-some-ram; -}; - -&lpuart1 { - bootph-pre-ram; - bootph-some-ram; -}; - -&usdhc1 { - bootph-pre-ram; - bootph-some-ram; -}; - -&usdhc2 { - bootph-pre-ram; - bootph-some-ram; - fsl,signal-voltage-switch-extra-delay-ms = <8>; -}; - -&lpi2c1 { - bootph-pre-ram; - bootph-some-ram; -}; - -&lpi2c2 { - bootph-pre-ram; - bootph-some-ram; -}; - -&lpi2c3 { - bootph-pre-ram; - bootph-some-ram; - - pmic@25 { - bootph-pre-ram; - bootph-some-ram; - - regulators { - bootph-pre-ram; - bootph-some-ram; - }; - }; - - eeprom@50 { - bootph-pre-ram; - bootph-some-ram; - }; -}; - -&s4muap { - bootph-pre-ram; - bootph-some-ram; - status = "okay"; -}; - -&clk { - bootph-all; - bootph-pre-ram; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-rates; - /delete-property/ assigned-clock-parents; -}; - -&osc_32k { - bootph-all; - bootph-pre-ram; -}; - -&osc_24m { - bootph-all; - bootph-pre-ram; -}; - -&clk_ext1 { - bootph-all; - bootph-pre-ram; -}; - -&wdog3 { - bootph-all; - bootph-pre-ram; }; |