diff options
Diffstat (limited to 'include')
29 files changed, 388 insertions, 965 deletions
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 745d2c3a966..ad7ebb1bbc9 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -108,6 +108,15 @@ struct global_data { */ unsigned long relocaddr; /** + * @initial_relocaddr: top address of U-Boot in RAM + * + * This should be the value of relocaddr after setup_dest_addr() and + * before reserve_pram() or any other allocations or reservations shift + * it. This address will, depending on the platform, be equivalent to + * ram_top and should also be considered an exclusive address. + */ + unsigned long initial_relocaddr; + /** * @irq_sp: IRQ stack pointer */ unsigned long irq_sp; @@ -448,6 +457,13 @@ struct global_data { */ struct upl *upl; #endif + /** + * @dram: array describing DRAM banks (start address and size for each bank) + */ + struct { /* RAM configuration */ + phys_addr_t start; + phys_size_t size; + } dram[CONFIG_NR_DRAM_BANKS]; }; #ifndef DO_DEPS_ONLY static_assert(sizeof(struct global_data) == GD_SIZE); @@ -538,7 +554,7 @@ static_assert(sizeof(struct global_data) == GD_SIZE); #if CONFIG_VAL(SYS_MALLOC_F_LEN) #define gd_malloc_ptr() gd->malloc_ptr #else -#define gd_malloc_ptr() 0L +#define gd_malloc_ptr() 0 #endif #if CONFIG_IS_ENABLED(UPL) diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h index 8c619c1b74a..931fe2f3274 100644 --- a/include/asm-generic/u-boot.h +++ b/include/asm-generic/u-boot.h @@ -59,10 +59,6 @@ struct bd_info { #endif ulong bi_arch_number; /* unique id for this board */ ulong bi_boot_params; /* where this board expects params */ - struct { /* RAM configuration */ - phys_addr_t start; - phys_size_t size; - } bi_dram[CONFIG_NR_DRAM_BANKS]; }; #endif /* __ASSEMBLY__ */ diff --git a/include/bootdev.h b/include/bootdev.h index 12c90c4ec1b..14f8a98633b 100644 --- a/include/bootdev.h +++ b/include/bootdev.h @@ -30,10 +30,10 @@ struct udevice; * generally very quick to access, e.g. less than 100ms * @BOOTDEVP_3_INTERNAL_SLOW: Internal devices which don't need scanning but * take a significant fraction of a second to access - * @BOOTDEVP_4_SCAN_FAST: Extenal devices which need scanning or bus + * @BOOTDEVP_4_SCAN_FAST: External devices which need scanning or bus * enumeration to find, but this enumeration happens quickly, typically under * 100ms - * @BOOTDEVP_5_SCAN_SLOW: Extenal devices which need scanning or bus + * @BOOTDEVP_5_SCAN_SLOW: External devices which need scanning or bus * enumeration to find. The enumeration takes significant fraction of a second * to complete * @BOOTDEVP_6_NET_BASE: Basic network devices which are quickly and easily @@ -327,7 +327,7 @@ int bootdev_hunt_and_find_by_label(const char *label, struct udevice **devp, * Bootdev scanners are used as needed. For example a label "mmc1" results in * running the "mmc" bootdrv. * - * @iter: Interation info, containing iter->cur_label + * @iter: Iteration info, containing iter->cur_label * @devp: New bootdev found, if any was found * @method_flagsp: If non-NULL, returns any flags implied by the label * (enum bootflow_meth_flags_t), 0 if none @@ -342,7 +342,7 @@ int bootdev_next_label(struct bootflow_iter *iter, struct udevice **devp, * This moves @devp to the next bootdev with the current priority. If there is * none, then it moves to the next priority and scans for new bootdevs there. * - * @iter: Interation info, containing iter->cur_prio + * @iter: Iteration info, containing iter->cur_prio * @devp: On entry this is the previous bootdev that was considered. On exit * this is the new bootdev, if any was found * Returns 0 on success (*devp is updated), -ENODEV if there are no more diff --git a/include/configs/aquila-imx95.h b/include/configs/aquila-imx95.h new file mode 100644 index 00000000000..07d09d138cb --- /dev/null +++ b/include/configs/aquila-imx95.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright (c) Toradex */ + +#ifndef __AQUILA_IMX95_H +#define __AQUILA_IMX95_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#define CFG_SYS_UBOOT_BASE \ + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +/* module has 8GB, 2GB from 0x80000000..0xffffffff, 6GB above */ +#define SZ_6G _AC(0x180000000, ULL) + +/* first 256MB reserved for firmware */ +#define CFG_SYS_INIT_RAM_ADDR 0x90000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_2M + +#define CFG_SYS_SDRAM_BASE 0x90000000 +#define PHYS_SDRAM 0x90000000 +#define PHYS_SDRAM_SIZE (SZ_2G - SZ_256M) +#define PHYS_SDRAM_2_SIZE SZ_6G + +#define CFG_SYS_SECURE_SDRAM_BASE 0x8A000000 /* Secure DDR region for A55, SPL could use first 2MB */ +#define CFG_SYS_SECURE_SDRAM_SIZE 0x06000000 + +#endif diff --git a/include/configs/evb_ast2700.h b/include/configs/evb_ast2700.h new file mode 100644 index 00000000000..6b73eddc1af --- /dev/null +++ b/include/configs/evb_ast2700.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) ASPEED Technology Inc. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/aspeed-common.h> + +/* Extra ENV for Boot Command */ +#define STR_HELPER(n) #n +#define STR(n) STR_HELPER(n) + +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE + +#define CFG_EXTRA_ENV_SETTINGS \ + "bootspi=fdt addr ${fdtspiaddr} && " \ + "fdt header get fitsize totalsize && " \ + "cp.b ${fdtspiaddr} ${loadaddr} ${fitsize} && " \ + "bootm ${loadaddr}; " \ + "echo Error loading kernel FIT image\0" \ + "loadaddr=" STR(CONFIG_SYS_LOAD_ADDR) "\0" \ + "bootside=a\0" \ + "rootfs=rofs-a\0" \ + "setmmcargs=setenv bootargs ${bootargs} " \ + "rootwait root=PARTLABEL=${rootfs}\0" \ + "boota=setenv bootpart 2; setenv rootfs rofs-a; " \ + "run setmmcargs; " \ + "ext4load mmc 0:${bootpart} ${loadaddr} fitImage && " \ + "bootm ${loadaddr}; " \ + "echo Error loading kernel FIT image\0" \ + "bootb=setenv bootpart 3; setenv rootfs rofs-b; " \ + "run setmmcargs; " \ + "ext4load mmc 0:${bootpart} ${loadaddr} fitImage && " \ + "bootm ${loadaddr}; " \ + "echo Error loading kernel FIT image\0" \ + "bootmmc=if test \"${bootside}\" = \"b\"; " \ + "then run bootb; run boota; " \ + "else run boota; run bootb; fi\0" \ + "setufsargs=setenv bootargs ${bootargs} " \ + "rootwait root=PARTLABEL=${rootfs}\0" \ + "ufsboota=setenv bootpart 2; setenv rootfs rofs-a; " \ + "run setufsargs; " \ + "ext4load scsi 0:${bootpart} ${loadaddr} fitImage && " \ + "bootm ${loadaddr}; " \ + "echo Error loading kernel FIT image\0" \ + "ufsbootb=setenv bootpart 3; setenv rootfs rofs-b; " \ + "run setufsargs; " \ + "ext4load scsi 0:${bootpart} ${loadaddr} fitImage && " \ + "bootm ${loadaddr}; " \ + "echo Error loading kernel FIT image\0" \ + "bootufs=if test \"${bootside}\" = \"b\"; " \ + "then run ufsbootb; run ufsboota; " \ + "else run ufsboota; run ufsbootb; fi\0" \ + "verify=no\0" \ + "" +#endif /* __CONFIG_H */ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 613abc50567..1811825baeb 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -50,85 +50,26 @@ /* Initial environment variables */ #ifndef SPL_NO_ENV #undef CFG_EXTRA_ENV_SETTINGS -#define CFG_EXTRA_ENV_SETTINGS \ - "board=ls1028ardb\0" \ - "hwconfig=fsl_ddr:bank_intlv=auto\0" \ - "fdtfile=fsl-ls1028a-rdb.dtb\0" \ - "image=Image\0" \ - "extra_bootargs=iommu.passthrough=1 arm-smmu.disable_bypass=0\0" \ - "othbootargs=video=1920x1080-32@60 cma=640M\0" \ - "ramdisk_addr=0x800000\0" \ - "ramdisk_size=0x2000000\0" \ - "bootm_size=0x10000000\0" \ - "kernel_addr=0x01000000\0" \ - "scriptaddr=0x80000000\0" \ - "scripthdraddr=0x80080000\0" \ - "fdtheader_addr_r=0x80100000\0" \ - "kernelheader_addr_r=0x80200000\0" \ - "load_addr=0xa0000000\0" \ - "kernel_addr_r=0x81000000\0" \ - "fdt_addr_r=0x90000000\0" \ - "ramdisk_addr_r=0xa0000000\0" \ - "kernel_start=0x1000000\0" \ - "kernelheader_start=0x600000\0" \ - "kernel_load=0xa0000000\0" \ - "kernel_size=0x2800000\0" \ - "kernelheader_size=0x40000\0" \ - "kernel_addr_sd=0x8000\0" \ - "kernel_size_sd=0x14000\0" \ - "kernelhdr_addr_sd=0x3000\0" \ - "kernelhdr_size_sd=0x20\0" \ - "console=ttyS0,115200\0" \ - "console_dbg=earlycon=uart8250,mmio,0x21c0500\0" \ - BOOTENV \ - "boot_scripts=ls1028ardb_boot.scr\0" \ - "boot_script_hdr=hdr_ls1028ardb_bs.out\0" \ - "scan_dev_for_boot_part=" \ - "part list ${devtype} ${devnum} devplist; " \ - "env exists devplist || setenv devplist 1; " \ - "for distro_bootpart in ${devplist}; do " \ - "if fstype ${devtype} " \ - "${devnum}:${distro_bootpart} " \ - "bootfstype; then " \ - "run scan_dev_for_boot; " \ - "fi; " \ - "done\0" \ - "boot_a_script=" \ - "load ${devtype} ${devnum}:${distro_bootpart} " \ - "${scriptaddr} ${prefix}${script}; " \ - "env exists secureboot && load ${devtype} " \ - "${devnum}:${distro_bootpart} " \ +#define CFG_EXTRA_ENV_SETTINGS \ + BOOTENV \ + "boot_scripts=ls1028ardb_boot.scr\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "env exists secureboot && load ${devtype} " \ + "${devnum}:${distro_bootpart} " \ "${scripthdraddr} ${prefix}${boot_script_hdr} " \ - "&& esbc_validate ${scripthdraddr};" \ - "source ${scriptaddr}\0" \ - "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \ - "sf probe 0:0 && sf read $load_addr " \ - "$kernel_start $kernel_size ; env exists secureboot &&" \ - "sf read $kernelheader_addr_r $kernelheader_start " \ - "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ - " bootm $load_addr#$board\0" \ - "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \ - "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \ - "&& hdp load $load_addr 0x2000\0" \ - "sd_bootcmd=echo Trying load from SD ...;" \ - "mmc dev 0;mmcinfo; mmc read $load_addr " \ - "$kernel_addr_sd $kernel_size_sd && " \ - "env exists secureboot && mmc read $kernelheader_addr_r " \ - "$kernelhdr_addr_sd $kernelhdr_size_sd " \ - " && esbc_validate ${kernelheader_addr_r};" \ - "bootm $load_addr#$board\0" \ - "sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \ - "mmc dev 0;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \ - "&& hdp load $load_addr 0x2000\0" \ - "emmc_bootcmd=echo Trying load from EMMC ..;" \ - "mmc dev 1;mmcinfo; mmc read $load_addr " \ - "$kernel_addr_sd $kernel_size_sd && " \ - "env exists secureboot && mmc read $kernelheader_addr_r " \ - "$kernelhdr_addr_sd $kernelhdr_size_sd " \ - " && esbc_validate ${kernelheader_addr_r};" \ - "bootm $load_addr#$board\0" \ - "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \ - "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \ - "&& hdp load $load_addr 0x2000\0" + "&& esbc_validate ${scripthdraddr};" \ + "source ${scriptaddr}\0" #endif #endif /* __LS1028A_RDB_H */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index a6aafb51854..36e330887cd 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -15,9 +15,9 @@ * Memory configurations */ #define PHYS_SDRAM_1 CSD0_BASE_ADDR -#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) +#define PHYS_SDRAM_1_SIZE (gd->dram[0].size) #define PHYS_SDRAM_2 CSD1_BASE_ADDR -#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) +#define PHYS_SDRAM_2_SIZE (gd->dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 2bd1426c7d9..e823611d2e4 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -51,9 +51,9 @@ /* Physical Memory Map */ #define PHYS_SDRAM_1 CSD0_BASE_ADDR -#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) +#define PHYS_SDRAM_1_SIZE (gd->dram[0].size) #define PHYS_SDRAM_2 CSD1_BASE_ADDR -#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) +#define PHYS_SDRAM_2_SIZE (gd->dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 14095b99f03..acd6eb6f8ac 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -86,9 +86,9 @@ /* Physical Memory Map */ #define PHYS_SDRAM_1 CSD0_BASE_ADDR -#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) +#define PHYS_SDRAM_1_SIZE (gd->dram[0].size) #define PHYS_SDRAM_2 CSD1_BASE_ADDR -#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) +#define PHYS_SDRAM_2_SIZE (gd->dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 3707de254e1..65babf50546 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -81,9 +81,9 @@ /* Physical Memory Map */ #define PHYS_SDRAM_1 CSD0_BASE_ADDR -#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) +#define PHYS_SDRAM_1_SIZE (gd->dram[0].size) #define PHYS_SDRAM_2 CSD1_BASE_ADDR -#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) +#define PHYS_SDRAM_2_SIZE (gd->dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index ef2848b71f3..d3a57a10a16 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -8,133 +8,11 @@ #ifndef __MX6QSABRE_COMMON_CONFIG_H #define __MX6QSABRE_COMMON_CONFIG_H -#include <linux/stringify.h> - #include "mx6_common.h" /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 -#ifdef CONFIG_SUPPORT_EMMC_BOOT -#define EMMC_ENV \ - "emmcdev=2\0" \ - "update_emmc_firmware=" \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if ${get_cmd} ${update_sd_firmware_filename}; then " \ - "if mmc dev ${emmcdev} 1; then " \ - "setexpr fw_sz ${filesize} / 0x200; " \ - "setexpr fw_sz ${fw_sz} + 1; " \ - "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ - "fi; " \ - "fi\0" -#else -#define EMMC_ENV "" -#endif - -#define CFG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=zImage\0" \ - "fdtfile=undefined\0" \ - "fdt_addr=0x18000000\0" \ - "boot_fdt=try\0" \ - "ip_dyn=yes\0" \ - "console=" CONSOLE_DEV "\0" \ - "dfuspi=dfu 0 sf 0:0:10000000:0\0" \ - "dfu_alt_info_spl=spl raw 0x400\0" \ - "dfu_alt_info_img=u-boot raw 0x10000\0" \ - "dfu_alt_info=spl raw 0x400\0" \ - "initrd_high=0xffffffff\0" \ - "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "mmcdev=" __stringify(CONFIG_ENV_MMC_DEVICE_INDEX) "\0" \ - "mmcpart=1\0" \ - "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ - "update_sd_firmware=" \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if mmc dev ${mmcdev}; then " \ - "if ${get_cmd} ${update_sd_firmware_filename}; then " \ - "setexpr fw_sz ${filesize} / 0x200; " \ - "setexpr fw_sz ${fw_sz} + 1; " \ - "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ - "fi; " \ - "fi\0" \ - EMMC_ENV \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=PARTUUID=${uuid} rootwait rw\0" \ - "loadbootscript=" \ - "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script} || " \ - "load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} || " \ - "load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image}\0" \ - "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile} || " \ - "load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run finduuid; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdtfile}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "findfdt="\ - "if test $fdtfile = undefined; then " \ - "if test $board_name = SABREAUTO && test $board_rev = MX6QP; then " \ - "setenv fdtfile imx6qp-sabreauto.dtb; fi; " \ - "if test $board_name = SABREAUTO && test $board_rev = MX6Q; then " \ - "setenv fdtfile imx6q-sabreauto.dtb; fi; " \ - "if test $board_name = SABREAUTO && test $board_rev = MX6DL; then " \ - "setenv fdtfile imx6dl-sabreauto.dtb; fi; " \ - "if test $board_name = SABRESD && test $board_rev = MX6QP; then " \ - "setenv fdtfile imx6qp-sabresd.dtb; fi; " \ - "if test $board_name = SABRESD && test $board_rev = MX6Q; then " \ - "setenv fdtfile imx6q-sabresd.dtb; fi; " \ - "if test $board_name = SABRESD && test $board_rev = MX6DL; then " \ - "setenv fdtfile imx6dl-sabresd.dtb; fi; " \ - "if test $fdtfile = undefined; then " \ - "echo WARNING: Could not determine dtb to use; fi; " \ - "fi;\0" \ - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index e491af3e927..b5602def87d 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -9,7 +9,6 @@ #define __MX6SABREAUTO_CONFIG_H #define CFG_MXC_UART_BASE UART4_BASE -#define CONSOLE_DEV "ttymxc3" #define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index e34947c94d0..1ea08f835dd 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -9,7 +9,6 @@ #define __MX6SABRESD_CONFIG_H #define CFG_MXC_UART_BASE UART1_BASE -#define CONSOLE_DEV "ttymxc0" #include "mx6sabre_common.h" diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 88b535e1bd0..a535163fd19 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -9,7 +9,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#include <linux/stringify.h> #include "mx6_common.h" #include <asm/mach-imx/gpio.h> @@ -23,78 +22,6 @@ #define CFG_SYS_FSL_USDHC_NUM 2 #endif -#define CFG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=zImage\0" \ - "console=ttymxc0\0" \ - "initrd_high=0xffffffff\0" \ - "fdt_file=undefined\0" \ - "fdt_addr=0x83000000\0" \ - "boot_fdt=try\0" \ - "ip_dyn=yes\0" \ - "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ - "mmcdev="__stringify(CONFIG_ENV_MMC_DEVICE_INDEX)"\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "findfdt="\ - "if test $fdt_file = undefined; then " \ - "if test $board_name = ULZ-EVK && test $board_rev = 14X14; then " \ - "setenv fdt_file imx6ulz-14x14-evk.dtb; fi; " \ - "if test $board_name = EVK && test $board_rev = 14X14; then " \ - "setenv fdt_file imx6ull-14x14-evk.dtb; fi; " \ - "if test $fdt_file = undefined; then " \ - "echo WARNING: Could not determine dtb to use; " \ - "fi; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 21dbec837f0..f36265f13e6 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -24,69 +24,6 @@ #define PHYS_SDRAM_SIZE SZ_1G #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CFG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "image=zImage\0" \ - "console=ttyLP0\0" \ - "initrd_high=0xffffffff\0" \ - "fdt_file=imx7ulp-evk.dtb\0" \ - "fdt_addr=0x63000000\0" \ - "boot_fdt=try\0" \ - "earlycon=lpuart32,0x402D0010\0" \ - "ip_dyn=yes\0" \ - "mmcdev="__stringify(CONFIG_ENV_MMC_DEVICE_INDEX)"\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=:::::eth0:dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "usb start; "\ - "${get_cmd} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE SZ_256K diff --git a/include/configs/rcar-gen5-common.h b/include/configs/rcar-gen5-common.h index 5ff2a76fc05..a0c05521c85 100644 --- a/include/configs/rcar-gen5-common.h +++ b/include/configs/rcar-gen5-common.h @@ -26,10 +26,50 @@ #if defined(CONFIG_RCAR_64_RSIP) #define CFG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ #define CFG_SYS_TIMER_RATE (133333333 / 4) -#endif /* Environment setting */ +#define CFG_EXTRA_ENV_SETTINGS \ + "rsip_ipl_params_base=0x8c100000\0" \ + "rsip_ipl_params_optee=0x8c100088\0" \ + "rsip_ipl_params_uboot=0x8c100030\0" \ + "rsip_ipl_optee_ep=0x8c400000\0" \ + "rsip_ipl_tfa_ep=0x8c200000\0" \ + "rsip_ipl_uboot_ep=0x8e300000\0" \ + "rsip_ipl_params_write=" \ + "base ${rsip_ipl_params_base} ; " \ + "mw 0x00 0 0x9e ; " /* Clear the area */ \ + "mw 0x00 0x00300103 ; " /* type, version, size */ \ + "mw 0x20 0x${rsip_ipl_params_uboot} ; " /* U-Boot descriptor */ \ + "" \ + "base ${rsip_ipl_params_uboot} ; " \ + "mw 0x00 0x00580101 ; " /* type, version, size */ \ + "mw 0x04 0x00000001 ; " /* attr */ \ + "mw 0x08 ${rsip_ipl_uboot_ep} ; " /* U-Boot entry point */ \ + "mw 0x10 0x000003c5 ; " /* SPSR */ \ + "" \ + "base ${rsip_ipl_params_optee} ; " \ + "mw 0x00 0x00580201 ; " /* type, version, size */ \ + "mw 0x04 0x00000008 ; " /* attr */ \ + "mw 0x08 ${rsip_ipl_optee_ep} ; " /* OPTEE-OS entry point */ \ + "mw 0x10 0x000003c5 ; " /* SPSR */ \ + "" \ + "base 0\0" \ + "rsip_ipl_boot_ca0=" /* Start TFA BL31, OPTEE-OS, U-Boot on Cortex-A720AE core 0 */ \ + "scsi scan && " /* Scan for UFS devices */ \ + "rproc init && " /* Start remoteproc */ \ + "rproc load 0 0x344c0000 0x60000 && " /* Load SCP from HF */ \ + "rproc start 0 && " /* Start SCP */ \ + "scsi read ${rsip_ipl_uboot_ep} 0x7200 0x100 && " /* Load U-Boot from UFS */ \ + "scsi read ${rsip_ipl_optee_ep} 0x5200 0x200 && " /* Load OPTEE-OS from UFS */ \ + "scsi read ${rsip_ipl_tfa_ep} 0x5000 0x40 && " /* Load TFA BL31 from UFS */ \ + "run rsip_ipl_params_write && " /* Write entry point descriptors */ \ + "rproc load 13 ${rsip_ipl_tfa_ep} 4 && " /* Set up Cortex-A720AE Core 0 */ \ + "rproc start 13\0" /* Start Cortex-A720AE Core 0 */ + +#else +/* Environment setting */ #define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" +#endif #endif /* __RCAR_GEN5_COMMON_H */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 7a333090b18..e4b84719c86 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -35,25 +35,9 @@ /* * Environment setup */ -#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \ - "bootcmd_" #devtypel #instance "=" \ - "setenv mmcdev " #instance"; "\ - "setenv bootpart " #instance":2 ; "\ - "run mmcboot\0" - -#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \ - #devtypel #instance " " - -#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \ - #devtypel #instance " " - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(LEGACY_MMC, legacy_mmc, 0) \ func(MMC, mmc, 1) \ - func(LEGACY_MMC, legacy_mmc, 1) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #include <env/ti/mmc.h> @@ -73,30 +57,6 @@ "uimageboot=echo Booting from mmc${mmcdev} ...; " \ "run args_mmc; " \ "bootm ${loadaddr}\0" \ - "findfdt="\ - "if test $board_name = sdp4430; then " \ - "setenv fdtfile omap4-sdp.dtb; fi; " \ - "if test $board_name = panda; then " \ - "setenv fdtfile omap4-panda.dtb; fi;" \ - "if test $board_name = panda-a4; then " \ - "setenv fdtfile omap4-panda-a4.dtb; fi;" \ - "if test $board_name = panda-es; then " \ - "setenv fdtfile omap4-panda-es.dtb; fi;" \ - "if test $board_name = duovero; then " \ - "setenv fdtfile omap4-duovero-parlor.dtb; fi;" \ - "if test $fdtfile = undefined; then " \ - "echo WARNING: Could not determine device tree to use; fi; \0" \ BOOTENV -/* - * Defines for SPL - * It is known that this will break HS devices. Since the current size of - * SPL is overlapped with public stack and breaking non HS devices to boot. - * So moving TEXT_BASE down to non-HS limit. - */ - -#ifdef CONFIG_XPL_BUILD -/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */ -#endif - #endif /* __CONFIG_TI_OMAP4_COMMON_H */ diff --git a/include/cros_ec.h b/include/cros_ec.h index 4ef34815e35..6e5153ceb6a 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -12,6 +12,7 @@ #include <ec_commands.h> #include <cros_ec_message.h> #include <asm/gpio.h> +#include <dm/device.h> #include <dm/of_extra.h> /* @@ -316,8 +317,10 @@ struct dm_cros_ec_ops { int (*get_switches)(struct udevice *dev); }; -#define dm_cros_ec_get_ops(dev) \ - ((struct dm_cros_ec_ops *)(dev)->driver->ops) +static inline const struct dm_cros_ec_ops *dm_cros_ec_get_ops(struct udevice *dev) +{ + return (const struct dm_cros_ec_ops *)(dev->driver->ops); +} int cros_ec_register(struct udevice *dev); diff --git a/include/dm/device.h b/include/dm/device.h index 7bcf6df2892..5d700888503 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -388,7 +388,7 @@ struct driver { const void *ops; /* driver-specific operations */ uint32_t flags; #if CONFIG_IS_ENABLED(ACPIGEN) - struct acpi_ops *acpi_ops; + const struct acpi_ops *acpi_ops; #endif }; diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h deleted file mode 100644 index 6a47825dac5..00000000000 --- a/include/dt-bindings/clock/rk3128-cru.h +++ /dev/null @@ -1,273 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (c) 2017 Rockchip Electronics Co. Ltd. - * Author: Elaine <[email protected]> - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3128_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3128_H - -/* core clocks */ -#define PLL_APLL 1 -#define PLL_DPLL 2 -#define PLL_CPLL 3 -#define PLL_GPLL 4 -#define ARMCLK 5 -#define PLL_GPLL_DIV2 6 -#define PLL_GPLL_DIV3 7 - -/* sclk gates (special clocks) */ -#define SCLK_SPI0 65 -#define SCLK_NANDC 67 -#define SCLK_SDMMC 68 -#define SCLK_SDIO 69 -#define SCLK_EMMC 71 -#define SCLK_UART0 77 -#define SCLK_UART1 78 -#define SCLK_UART2 79 -#define SCLK_I2S0 80 -#define SCLK_I2S1 81 -#define SCLK_SPDIF 83 -#define SCLK_TIMER0 85 -#define SCLK_TIMER1 86 -#define SCLK_TIMER2 87 -#define SCLK_TIMER3 88 -#define SCLK_TIMER4 89 -#define SCLK_TIMER5 90 -#define SCLK_SARADC 91 -#define SCLK_I2S_OUT 113 -#define SCLK_SDMMC_DRV 114 -#define SCLK_SDIO_DRV 115 -#define SCLK_EMMC_DRV 117 -#define SCLK_SDMMC_SAMPLE 118 -#define SCLK_SDIO_SAMPLE 119 -#define SCLK_EMMC_SAMPLE 121 -#define SCLK_VOP 122 -#define SCLK_MAC_SRC 124 -#define SCLK_MAC 126 -#define SCLK_MAC_REFOUT 127 -#define SCLK_MAC_REF 128 -#define SCLK_MAC_RX 129 -#define SCLK_MAC_TX 130 -#define SCLK_HEVC_CORE 134 -#define SCLK_RGA 135 -#define SCLK_CRYPTO 138 -#define SCLK_TSP 139 -#define SCLK_OTGPHY0 142 -#define SCLK_OTGPHY1 143 -#define SCLK_DDRC 144 -#define SCLK_PVTM_FUNC 145 -#define SCLK_PVTM_CORE 146 -#define SCLK_PVTM_GPU 147 -#define SCLK_MIPI_24M 148 -#define SCLK_PVTM 149 -#define SCLK_CIF_SRC 150 -#define SCLK_CIF_OUT_SRC 151 -#define SCLK_CIF_OUT 152 -#define SCLK_SFC 153 -#define SCLK_USB480M 154 - -/* dclk gates */ -#define DCLK_VOP 190 -#define DCLK_EBC 191 - -/* aclk gates */ -#define ACLK_VIO0 192 -#define ACLK_VIO1 193 -#define ACLK_DMAC 194 -#define ACLK_CPU 195 -#define ACLK_VEPU 196 -#define ACLK_VDPU 197 -#define ACLK_CIF 198 -#define ACLK_IEP 199 -#define ACLK_LCDC0 204 -#define ACLK_RGA 205 -#define ACLK_PERI 210 -#define ACLK_VOP 211 -#define ACLK_GMAC 212 -#define ACLK_GPU 213 - -/* pclk gates */ -#define PCLK_SARADC 318 -#define PCLK_WDT 319 -#define PCLK_GPIO0 320 -#define PCLK_GPIO1 321 -#define PCLK_GPIO2 322 -#define PCLK_GPIO3 323 -#define PCLK_VIO_H2P 324 -#define PCLK_MIPI 325 -#define PCLK_EFUSE 326 -#define PCLK_HDMI 327 -#define PCLK_ACODEC 328 -#define PCLK_GRF 329 -#define PCLK_I2C0 332 -#define PCLK_I2C1 333 -#define PCLK_I2C2 334 -#define PCLK_I2C3 335 -#define PCLK_SPI0 338 -#define PCLK_UART0 341 -#define PCLK_UART1 342 -#define PCLK_UART2 343 -#define PCLK_TSADC 344 -#define PCLK_PWM 350 -#define PCLK_TIMER 353 -#define PCLK_CPU 354 -#define PCLK_PERI 363 -#define PCLK_GMAC 367 -#define PCLK_PMU_PRE 368 -#define PCLK_SIM_CARD 369 - -/* hclk gates */ -#define HCLK_SPDIF 440 -#define HCLK_GPS 441 -#define HCLK_USBHOST 442 -#define HCLK_I2S_8CH 443 -#define HCLK_I2S_2CH 444 -#define HCLK_VOP 452 -#define HCLK_NANDC 453 -#define HCLK_SDMMC 456 -#define HCLK_SDIO 457 -#define HCLK_EMMC 459 -#define HCLK_CPU 460 -#define HCLK_VEPU 461 -#define HCLK_VDPU 462 -#define HCLK_LCDC0 463 -#define HCLK_EBC 465 -#define HCLK_VIO 466 -#define HCLK_RGA 467 -#define HCLK_IEP 468 -#define HCLK_VIO_H2P 469 -#define HCLK_CIF 470 -#define HCLK_HOST2 473 -#define HCLK_OTG 474 -#define HCLK_TSP 475 -#define HCLK_CRYPTO 476 -#define HCLK_PERI 478 - -#define CLK_NR_CLKS (HCLK_PERI + 1) - -/* soft-reset indices */ -#define SRST_CORE0_PO 0 -#define SRST_CORE1_PO 1 -#define SRST_CORE2_PO 2 -#define SRST_CORE3_PO 3 -#define SRST_CORE0 4 -#define SRST_CORE1 5 -#define SRST_CORE2 6 -#define SRST_CORE3 7 -#define SRST_CORE0_DBG 8 -#define SRST_CORE1_DBG 9 -#define SRST_CORE2_DBG 10 -#define SRST_CORE3_DBG 11 -#define SRST_TOPDBG 12 -#define SRST_ACLK_CORE 13 -#define SRST_STRC_SYS_A 14 -#define SRST_L2C 15 - -#define SRST_CPUSYS_H 18 -#define SRST_AHB2APBSYS_H 19 -#define SRST_SPDIF 20 -#define SRST_INTMEM 21 -#define SRST_ROM 22 -#define SRST_PERI_NIU 23 -#define SRST_I2S_2CH 24 -#define SRST_I2S_8CH 25 -#define SRST_GPU_PVTM 26 -#define SRST_FUNC_PVTM 27 -#define SRST_CORE_PVTM 29 -#define SRST_EFUSE_P 30 -#define SRST_ACODEC_P 31 - -#define SRST_GPIO0 32 -#define SRST_GPIO1 33 -#define SRST_GPIO2 34 -#define SRST_GPIO3 35 -#define SRST_MIPIPHY_P 36 -#define SRST_UART0 39 -#define SRST_UART1 40 -#define SRST_UART2 41 -#define SRST_I2C0 43 -#define SRST_I2C1 44 -#define SRST_I2C2 45 -#define SRST_I2C3 46 -#define SRST_SFC 47 - -#define SRST_PWM 48 -#define SRST_DAP_PO 50 -#define SRST_DAP 51 -#define SRST_DAP_SYS 52 -#define SRST_CRYPTO 53 -#define SRST_GRF 55 -#define SRST_GMAC 56 -#define SRST_PERIPH_SYS_A 57 -#define SRST_PERIPH_SYS_H 58 -#define SRST_PERIPH_SYS_P 59 -#define SRST_SMART_CARD 60 -#define SRST_CPU_PERI 61 -#define SRST_EMEM_PERI 62 -#define SRST_USB_PERI 63 - -#define SRST_DMA 64 -#define SRST_GPS 67 -#define SRST_NANDC 68 -#define SRST_USBOTG0 69 -#define SRST_OTGC0 71 -#define SRST_USBOTG1 72 -#define SRST_OTGC1 74 -#define SRST_DDRMSCH 79 - -#define SRST_SDMMC 81 -#define SRST_SDIO 82 -#define SRST_EMMC 83 -#define SRST_SPI 84 -#define SRST_WDT 86 -#define SRST_SARADC 87 -#define SRST_DDRPHY 88 -#define SRST_DDRPHY_P 89 -#define SRST_DDRCTRL 90 -#define SRST_DDRCTRL_P 91 -#define SRST_TSP 92 -#define SRST_TSP_CLKIN 93 -#define SRST_HOST0_ECHI 94 - -#define SRST_HDMI_P 96 -#define SRST_VIO_ARBI_H 97 -#define SRST_VIO0_A 98 -#define SRST_VIO_BUS_H 99 -#define SRST_VOP_A 100 -#define SRST_VOP_H 101 -#define SRST_VOP_D 102 -#define SRST_UTMI0 103 -#define SRST_UTMI1 104 -#define SRST_USBPOR 105 -#define SRST_IEP_A 106 -#define SRST_IEP_H 107 -#define SRST_RGA_A 108 -#define SRST_RGA_H 109 -#define SRST_CIF0 110 -#define SRST_PMU 111 - -#define SRST_VCODEC_A 112 -#define SRST_VCODEC_H 113 -#define SRST_VIO1_A 114 -#define SRST_HEVC_CORE 115 -#define SRST_VCODEC_NIU_A 116 -#define SRST_PMU_NIU_P 117 -#define SRST_LCDC0_S 119 -#define SRST_GPU 120 -#define SRST_GPU_NIU_A 122 -#define SRST_EBC_A 123 -#define SRST_EBC_H 124 - -#define SRST_CORE_DBG 128 -#define SRST_DBG_P 129 -#define SRST_TIMER0 130 -#define SRST_TIMER1 131 -#define SRST_TIMER2 132 -#define SRST_TIMER3 133 -#define SRST_TIMER4 134 -#define SRST_TIMER5 135 -#define SRST_VIO_H2P 136 -#define SRST_VIO_MIPI_DSI 137 - -#endif diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h deleted file mode 100644 index de550ea56ee..00000000000 --- a/include/dt-bindings/clock/rk3228-cru.h +++ /dev/null @@ -1,287 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (c) 2015 Rockchip Electronics Co. Ltd. - * Author: Jeffy Chen <[email protected]> - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3228_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3228_H - -/* core clocks */ -#define PLL_APLL 1 -#define PLL_DPLL 2 -#define PLL_CPLL 3 -#define PLL_GPLL 4 -#define ARMCLK 5 - -/* sclk gates (special clocks) */ -#define SCLK_SPI0 65 -#define SCLK_NANDC 67 -#define SCLK_SDMMC 68 -#define SCLK_SDIO 69 -#define SCLK_EMMC 71 -#define SCLK_TSADC 72 -#define SCLK_UART0 77 -#define SCLK_UART1 78 -#define SCLK_UART2 79 -#define SCLK_I2S0 80 -#define SCLK_I2S1 81 -#define SCLK_I2S2 82 -#define SCLK_SPDIF 83 -#define SCLK_TIMER0 85 -#define SCLK_TIMER1 86 -#define SCLK_TIMER2 87 -#define SCLK_TIMER3 88 -#define SCLK_TIMER4 89 -#define SCLK_TIMER5 90 -#define SCLK_I2S_OUT 113 -#define SCLK_SDMMC_DRV 114 -#define SCLK_SDIO_DRV 115 -#define SCLK_EMMC_DRV 117 -#define SCLK_SDMMC_SAMPLE 118 -#define SCLK_SDIO_SAMPLE 119 -#define SCLK_SDIO_SRC 120 -#define SCLK_EMMC_SAMPLE 121 -#define SCLK_VOP 122 -#define SCLK_HDMI_HDCP 123 -#define SCLK_MAC_SRC 124 -#define SCLK_MAC_EXTCLK 125 -#define SCLK_MAC 126 -#define SCLK_MAC_REFOUT 127 -#define SCLK_MAC_REF 128 -#define SCLK_MAC_RX 129 -#define SCLK_MAC_TX 130 -#define SCLK_MAC_PHY 131 -#define SCLK_MAC_OUT 132 -#define SCLK_VDEC_CABAC 133 -#define SCLK_VDEC_CORE 134 -#define SCLK_RGA 135 -#define SCLK_HDCP 136 -#define SCLK_HDMI_CEC 137 -#define SCLK_CRYPTO 138 -#define SCLK_TSP 139 -#define SCLK_HSADC 140 -#define SCLK_WIFI 141 -#define SCLK_OTGPHY0 142 -#define SCLK_OTGPHY1 143 -#define SCLK_HDMI_PHY 144 - -/* dclk gates */ -#define DCLK_VOP 190 -#define DCLK_HDMI_PHY 191 - -/* aclk gates */ -#define ACLK_DMAC 194 -#define ACLK_CPU 195 -#define ACLK_VPU_PRE 196 -#define ACLK_RKVDEC_PRE 197 -#define ACLK_RGA_PRE 198 -#define ACLK_IEP_PRE 199 -#define ACLK_HDCP_PRE 200 -#define ACLK_VOP_PRE 201 -#define ACLK_VPU 202 -#define ACLK_RKVDEC 203 -#define ACLK_IEP 204 -#define ACLK_RGA 205 -#define ACLK_HDCP 206 -#define ACLK_PERI 210 -#define ACLK_VOP 211 -#define ACLK_GMAC 212 -#define ACLK_GPU 213 - -/* pclk gates */ -#define PCLK_GPIO0 320 -#define PCLK_GPIO1 321 -#define PCLK_GPIO2 322 -#define PCLK_GPIO3 323 -#define PCLK_VIO_H2P 324 -#define PCLK_HDCP 325 -#define PCLK_EFUSE_1024 326 -#define PCLK_EFUSE_256 327 -#define PCLK_GRF 329 -#define PCLK_I2C0 332 -#define PCLK_I2C1 333 -#define PCLK_I2C2 334 -#define PCLK_I2C3 335 -#define PCLK_SPI0 338 -#define PCLK_UART0 341 -#define PCLK_UART1 342 -#define PCLK_UART2 343 -#define PCLK_TSADC 344 -#define PCLK_PWM 350 -#define PCLK_TIMER 353 -#define PCLK_CPU 354 -#define PCLK_PERI 363 -#define PCLK_HDMI_CTRL 364 -#define PCLK_HDMI_PHY 365 -#define PCLK_GMAC 367 - -/* hclk gates */ -#define HCLK_I2S0_8CH 442 -#define HCLK_I2S1_8CH 443 -#define HCLK_I2S2_2CH 444 -#define HCLK_SPDIF_8CH 445 -#define HCLK_VOP 452 -#define HCLK_NANDC 453 -#define HCLK_SDMMC 456 -#define HCLK_SDIO 457 -#define HCLK_EMMC 459 -#define HCLK_CPU 460 -#define HCLK_VPU_PRE 461 -#define HCLK_RKVDEC_PRE 462 -#define HCLK_VIO_PRE 463 -#define HCLK_VPU 464 -#define HCLK_RKVDEC 465 -#define HCLK_VIO 466 -#define HCLK_RGA 467 -#define HCLK_IEP 468 -#define HCLK_VIO_H2P 469 -#define HCLK_HDCP_MMU 470 -#define HCLK_HOST0 471 -#define HCLK_HOST1 472 -#define HCLK_HOST2 473 -#define HCLK_OTG 474 -#define HCLK_TSP 475 -#define HCLK_M_CRYPTO 476 -#define HCLK_S_CRYPTO 477 -#define HCLK_PERI 478 - -#define CLK_NR_CLKS (HCLK_PERI + 1) - -/* soft-reset indices */ -#define SRST_CORE0_PO 0 -#define SRST_CORE1_PO 1 -#define SRST_CORE2_PO 2 -#define SRST_CORE3_PO 3 -#define SRST_CORE0 4 -#define SRST_CORE1 5 -#define SRST_CORE2 6 -#define SRST_CORE3 7 -#define SRST_CORE0_DBG 8 -#define SRST_CORE1_DBG 9 -#define SRST_CORE2_DBG 10 -#define SRST_CORE3_DBG 11 -#define SRST_TOPDBG 12 -#define SRST_ACLK_CORE 13 -#define SRST_NOC 14 -#define SRST_L2C 15 - -#define SRST_CPUSYS_H 18 -#define SRST_BUSSYS_H 19 -#define SRST_SPDIF 20 -#define SRST_INTMEM 21 -#define SRST_ROM 22 -#define SRST_OTG_ADP 23 -#define SRST_I2S0 24 -#define SRST_I2S1 25 -#define SRST_I2S2 26 -#define SRST_ACODEC_P 27 -#define SRST_DFIMON 28 -#define SRST_MSCH 29 -#define SRST_EFUSE1024 30 -#define SRST_EFUSE256 31 - -#define SRST_GPIO0 32 -#define SRST_GPIO1 33 -#define SRST_GPIO2 34 -#define SRST_GPIO3 35 -#define SRST_PERIPH_NOC_A 36 -#define SRST_PERIPH_NOC_BUS_H 37 -#define SRST_PERIPH_NOC_P 38 -#define SRST_UART0 39 -#define SRST_UART1 40 -#define SRST_UART2 41 -#define SRST_PHYNOC 42 -#define SRST_I2C0 43 -#define SRST_I2C1 44 -#define SRST_I2C2 45 -#define SRST_I2C3 46 - -#define SRST_PWM 48 -#define SRST_A53_GIC 49 -#define SRST_DAP 51 -#define SRST_DAP_NOC 52 -#define SRST_CRYPTO 53 -#define SRST_SGRF 54 -#define SRST_GRF 55 -#define SRST_GMAC 56 -#define SRST_PERIPH_NOC_H 58 -#define SRST_MACPHY 63 - -#define SRST_DMA 64 -#define SRST_NANDC 68 -#define SRST_USBOTG 69 -#define SRST_OTGC 70 -#define SRST_USBHOST0 71 -#define SRST_HOST_CTRL0 72 -#define SRST_USBHOST1 73 -#define SRST_HOST_CTRL1 74 -#define SRST_USBHOST2 75 -#define SRST_HOST_CTRL2 76 -#define SRST_USBPOR0 77 -#define SRST_USBPOR1 78 -#define SRST_DDRMSCH 79 - -#define SRST_SMART_CARD 80 -#define SRST_SDMMC 81 -#define SRST_SDIO 82 -#define SRST_EMMC 83 -#define SRST_SPI 84 -#define SRST_TSP_H 85 -#define SRST_TSP 86 -#define SRST_TSADC 87 -#define SRST_DDRPHY 88 -#define SRST_DDRPHY_P 89 -#define SRST_DDRCTRL 90 -#define SRST_DDRCTRL_P 91 -#define SRST_HOST0_ECHI 92 -#define SRST_HOST1_ECHI 93 -#define SRST_HOST2_ECHI 94 -#define SRST_VOP_NOC_A 95 - -#define SRST_HDMI_P 96 -#define SRST_VIO_ARBI_H 97 -#define SRST_IEP_NOC_A 98 -#define SRST_VIO_NOC_H 99 -#define SRST_VOP_A 100 -#define SRST_VOP_H 101 -#define SRST_VOP_D 102 -#define SRST_UTMI0 103 -#define SRST_UTMI1 104 -#define SRST_UTMI2 105 -#define SRST_UTMI3 106 -#define SRST_RGA 107 -#define SRST_RGA_NOC_A 108 -#define SRST_RGA_A 109 -#define SRST_RGA_H 110 -#define SRST_HDCP_A 111 - -#define SRST_VPU_A 112 -#define SRST_VPU_H 113 -#define SRST_VPU_NOC_A 116 -#define SRST_VPU_NOC_H 117 -#define SRST_RKVDEC_A 118 -#define SRST_RKVDEC_NOC_A 119 -#define SRST_RKVDEC_H 120 -#define SRST_RKVDEC_NOC_H 121 -#define SRST_RKVDEC_CORE 122 -#define SRST_RKVDEC_CABAC 123 -#define SRST_IEP_A 124 -#define SRST_IEP_H 125 -#define SRST_GPU_A 126 -#define SRST_GPU_NOC_A 127 - -#define SRST_CORE_DBG 128 -#define SRST_DBG_P 129 -#define SRST_TIMER0 130 -#define SRST_TIMER1 131 -#define SRST_TIMER2 132 -#define SRST_TIMER3 133 -#define SRST_TIMER4 134 -#define SRST_TIMER5 135 -#define SRST_VIO_H2P 136 -#define SRST_HDMIPHY 139 -#define SRST_VDAC 140 -#define SRST_TIMER_6CH_P 141 - -#endif diff --git a/include/env/nxp/mx6sabre_common.env b/include/env/nxp/mx6sabre_common.env new file mode 100644 index 00000000000..5346cd4e953 --- /dev/null +++ b/include/env/nxp/mx6sabre_common.env @@ -0,0 +1,114 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +script=boot.scr +image=zImage +fdtfile=undefined +fdt_addr=0x18000000 +boot_fdt=try +ip_dyn=yes +dfuspi=dfu 0 sf 0:0:10000000:0 +dfu_alt_info_spl=spl raw 0x400 +dfu_alt_info_img=u-boot raw 0x10000 +dfu_alt_info=spl raw 0x400 +initrd_high=0xffffffff +splashimage=CONFIG_SYS_LOAD_ADDR +mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX +mmcpart=1 +finduuid=part uuid mmc ${mmcdev}:2 uuid +update_sd_firmware=if test ${ip_dyn} = yes; then + setenv get_cmd dhcp; + else + setenv get_cmd tftp; + fi; + if mmc dev ${mmcdev}; then + if ${get_cmd} ${update_sd_firmware_filename}; then + setexpr fw_sz ${filesize} / 0x200; + setexpr fw_sz ${fw_sz} + 1; + mmc write ${loadaddr} 0x2 ${fw_sz}; + fi; + fi +#ifdef CONFIG_SUPPORT_EMMC_BOOT +emmcdev=2 +update_emmc_firmware=if test ${ip_dyn} = yes; then + setenv get_cmd dhcp; + else + setenv get_cmd tftp; + fi; + if ${get_cmd} ${update_sd_firmware_filename}; then + if mmc dev ${emmcdev} 1; then + setexpr fw_sz ${filesize} / 0x200; + setexpr fw_sz ${fw_sz} + 1; + mmc write ${loadaddr} 0x2 ${fw_sz}; + fi; + fi +#endif +mmcargs=setenv bootargs console=${console},${baudrate} root=PARTUUID=${uuid} rootwait rw +loadbootscript=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script} || + load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${script}; +bootscript=echo Running bootscript from mmc ...; source +loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} || + load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image} +loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile} || + load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile} +mmcboot=echo Booting from mmc ...; + run finduuid; + run mmcargs; + if test ${boot_fdt} = yes || test ${boot_fdt} = try; then + if run loadfdt; then + bootz ${loadaddr} - ${fdt_addr}; + else + if test ${boot_fdt} = try; then + bootz; + else + echo WARN: Cannot load the DT; + fi; + fi; + else + bootz; + fi; +netargs=setenv bootargs console=${console},${baudrate} root=/dev/nfs + ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp +netboot=echo Booting from net ...; + run netargs; + if test ${ip_dyn} = yes; then + setenv get_cmd dhcp; + else + setenv get_cmd tftp; + fi; + ${get_cmd} ${image}; + if test ${boot_fdt} = yes || test ${boot_fdt} = try; then + if ${get_cmd} ${fdt_addr} ${fdtfile}; then + bootz ${loadaddr} - ${fdt_addr}; + else + if test ${boot_fdt} = try; then + bootz; + else + echo WARN: Cannot load the DT; + fi; + fi; + else + bootz; + fi; +findfdt=if test $fdtfile = undefined; then + if test $board_name = SABREAUTO && test $board_rev = MX6QP; then + setenv fdtfile imx6qp-sabreauto.dtb; + fi; + if test $board_name = SABREAUTO && test $board_rev = MX6Q; then + setenv fdtfile imx6q-sabreauto.dtb; + fi; + if test $board_name = SABREAUTO && test $board_rev = MX6DL; then + setenv fdtfile imx6dl-sabreauto.dtb; + fi; + if test $board_name = SABRESD && test $board_rev = MX6QP; then + setenv fdtfile imx6qp-sabresd.dtb; + fi; + if test $board_name = SABRESD && test $board_rev = MX6Q; then + setenv fdtfile imx6q-sabresd.dtb; + fi; + if test $board_name = SABRESD && test $board_rev = MX6DL; then + setenv fdtfile imx6dl-sabresd.dtb; + fi; + if test $fdtfile = undefined; then + echo WARNING: Could not determine dtb to use; + fi; + fi; diff --git a/include/fdtdec.h b/include/fdtdec.h index 46eaa0da63c..51d9f14a9f2 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -57,6 +57,7 @@ struct fdt_memory { }; struct bd_info; +struct global_data; /** * enum fdt_source_t - indicates where the devicetree came from @@ -974,7 +975,7 @@ int fdtdec_setup_mem_size_base(void); int fdtdec_setup_mem_size_base_lowest(void); /** - * fdtdec_setup_memory_banksize() - decode and populate gd->bd->bi_dram + * fdtdec_setup_memory_banksize() - decode and populate gd->dram * * Decode the /memory 'reg' property to determine the address and size of the * memory banks. Use this data to populate the global data board info with the @@ -1256,12 +1257,12 @@ int board_fdt_blob_setup(void **fdtp); * @param basep Returns base address of first memory bank (NULL to * ignore) * @param sizep Returns total memory size (NULL to ignore) - * @param bd Updated with the memory bank information (NULL to skip) + * @param gd_ptr Updated with the memory bank information (NULL to skip) * Return: 0 if OK, -ve on error */ int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id, phys_addr_t *basep, phys_size_t *sizep, - struct bd_info *bd); + struct global_data *gd_ptr); /** * fdtdec_get_srcname() - Get the name of where the devicetree comes from diff --git a/include/image.h b/include/image.h index 7b16284257a..9c8a746d576 100644 --- a/include/image.h +++ b/include/image.h @@ -905,7 +905,7 @@ int boot_get_fdt(void *buf, const char *select, uint arch, struct bootm_headers *images, char **of_flat_tree, ulong *of_size); -void boot_fdt_add_mem_rsv_regions(void *fdt_blob); +void boot_fdt_add_mem_rsv_regions(const void *fdt_blob); int boot_relocate_fdt(char **of_flat_tree, ulong *of_size); int boot_ramdisk_high(ulong rd_data, ulong rd_len, ulong *initrd_start, diff --git a/include/init.h b/include/init.h index c31ebd83b85..23466d3f153 100644 --- a/include/init.h +++ b/include/init.h @@ -80,7 +80,7 @@ int dram_init(void); * dram_init_banksize() - Set up DRAM bank sizes * * This can be implemented by boards to set up the DRAM bank information in - * gd->bd->bi_dram(). It is called just before relocation, after dram_init() + * gd->dram[] It is called just before relocation, after dram_init() * is called. * * If this is not provided, a default implementation will try to set up a diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 2d754fa4287..366f2d968a3 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -246,6 +246,11 @@ struct clk *clk_register_fixed_factor(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, unsigned int mult, unsigned int div); +struct clk *clk_register_divider_table(struct udevice *dev, const char *name, + const char *parent_name, unsigned long flags, + void __iomem *reg, u8 shift, u8 width, + u8 clk_divider_flags, const struct clk_div_table *table); + struct clk *clk_register_divider(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, diff --git a/include/dbsc5.h b/include/r8a779g0-dbsc5.h index b9b8703141a..b9b8703141a 100644 --- a/include/dbsc5.h +++ b/include/r8a779g0-dbsc5.h diff --git a/include/r8a78000-dbsc5.h b/include/r8a78000-dbsc5.h new file mode 100644 index 00000000000..7954f5b0761 --- /dev/null +++ b/include/r8a78000-dbsc5.h @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2026 Renesas Electronics Corp. + * + * Portions Copyright (C) 2026 Synopsys, Inc. Used with permission. All rights reserved. + */ + +#ifndef __INCLUDE_DBSC5_H__ +#define __INCLUDE_DBSC5_H__ + +/* The number of channels X5H has */ +#define DRAM_CH_CNT 16 +/* The number of slices X5H has */ +#define SLICE_CNT 2 +/* The number of chip select X5H has */ +#define CS_CNT 2 + +struct renesas_dbsc5_board_config { + u32 bdcfg_phyvalid; + u32 bdcfg_tx_drv; + u32 bdcfg_tx_ffc; + u32 bdcfg_rx_odt; + u8 bdcfg_rx_dfe; + u8 bdcfg_tx_odt; + u8 bdcfg_tx_ntodt; + u8 bdcfg_tx_dfe; + u8 bdcfg_rx_dca; + u8 bdcfg_rx_drv; + u32 bdcfg_rx_emphasis; + u8 bdcfg_tx_dca; + u8 bdcfg_ca_vref; + u32 bdcfg_rx_vref; + u32 bdcfg_rx_vref_step; + u32 bdcfg_tx_vref; + u8 bdcfg_rfm_chk; + + /* Board parameter about channels */ + struct { + /* + * 0x00: 4Gb dual channel die / 2Gb single channel die + * 0x01: 6Gb dual channel die / 3Gb single channel die + * 0x02: 8Gb dual channel die / 4Gb single channel die + * 0x03: 12Gb dual channel die / 6Gb single channel die + * 0x04: 16Gb dual channel die / 8Gb single channel die + * 0x05: 24Gb dual channel die / 12Gb single channel die + * 0x06: 32Gb dual channel die / 16Gb single channel die + * 0x07: 24Gb single channel die + * 0x08: 32Gb single channel die + * 0xFF: NO_MEMORY + */ + u8 bdcfg_ddr_density[CS_CNT]; + /* SoC caX([6][5][4][3][2][1][0]) -> MEM caY: */ + u32 bdcfg_ca_swap; + /* SoC dqsX([1][0]) -> MEM dqsY: */ + u8 bdcfg_dqs_swap; + /* SoC dq([7][6][5][4][3][2][1][0]) -> MEM dqY/dm: (8 means DM) */ + u32 bdcfg_dq_swap[SLICE_CNT]; + /* SoC dm -> MEM dqY/dm: (8 means DM) */ + u8 bdcfg_dm_swap[SLICE_CNT]; + } ch[DRAM_CH_CNT]; +}; + +#endif /* __INCLUDE_DBSC5_H__ */ diff --git a/include/sandbox_host.h b/include/sandbox_host.h index f7a5fc67230..1330358ef7a 100644 --- a/include/sandbox_host.h +++ b/include/sandbox_host.h @@ -9,16 +9,25 @@ #define __SANDBOX_HOST__ /** + * Device flags. + */ +enum host_platform_flags { + HOST_FLAG_BROKEN = BIT(0), /** Simulate broken device */ +}; + +/** * struct host_sb_plat - platform data for a host device * * @label: Label for this device (allocated) * @filename: Name of file this is attached to, or NULL (allocated) * @fd: File descriptor of file, or 0 for none (file is not open) + * @flags: Device flags (e.g. for unit tests). */ struct host_sb_plat { char *label; char *filename; int fd; + unsigned int flags; }; /** @@ -122,4 +131,13 @@ struct udevice *host_get_cur_dev(void); */ void host_set_cur_dev(struct udevice *dev); +/** + * host_set_flags_by_label() - Set the host device test flags + * + * @label: Label of the attachment, e.g. "test1" + * @flags: Device flags + * Returns: 0 if OK, -ve on error + */ +int host_set_flags_by_label(const char *label, unsigned int flags); + #endif /* __SANDBOX_HOST__ */ |